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An Exact Analysis For Efficient Computation Of Random-Pattern Testability In Combinational Circuits, Sharad C. Seth, Bhargab B. Bhattacharya, Vishwani Agrawal

CSE Conference and Workshop Papers

Experimental evidence shows that low testability in a typical circuit is much more likely due to poor observability than poor controllability. Thus, from theoretical and practical standpoints, it is important to develop an accurate model for observability computation. One such model, in terms of supergates, is proposed in the first part of this paper thus complimenting our earlier work. It is now possible to obtain exact random-pattern testability for each line in a circuit.

The second part of the paper analyzes the supegate structure of a circuit from a graph theoretic viewpoint. Finding a supergate is related to determining the …