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Articles 1 - 9 of 9
Full-Text Articles in Computer Engineering
Skybridge: A New Nanoscale 3-D Computing Framework For Future Integrated Circuits, Mostafizur Rahman
Skybridge: A New Nanoscale 3-D Computing Framework For Future Integrated Circuits, Mostafizur Rahman
Doctoral Dissertations
Continuous scaling of CMOS has been the major catalyst in miniaturization of integrated circuits (ICs) and crucial for global socio-economic progress. However, continuing the traditional way of scaling to sub-20nm technologies is proving to be very difficult as MOSFETs are reaching their fundamental performance limits [1] and interconnection bottleneck is dominating IC operational power and performance [2]. Migrating to 3-D, as a way to advance scaling, has been elusive due to inherent customization and manufacturing requirements in CMOS architecture that are incompatible with 3-D organization. Partial attempts with die-die [3] and layer-layer [4] stacking have their own limitations [5]. We …
Physically Equivalent Intelligent Systems For Reasoning Under Uncertainty At Nanoscale, Santosh Khasanvis
Physically Equivalent Intelligent Systems For Reasoning Under Uncertainty At Nanoscale, Santosh Khasanvis
Doctoral Dissertations
Machines today lack the inherent ability to reason and make decisions, or operate in the presence of uncertainty. Machine-learning methods such as Bayesian Networks (BNs) are widely acknowledged for their ability to uncover relationships and generate causal models for complex interactions. However, their massive computational requirement, when implemented on conventional computers, hinders their usefulness in many critical problem areas e.g., genetic basis of diseases, macro finance, text classification, environment monitoring, etc. We propose a new non-von Neumann technology framework purposefully architected across all layers for solving these problems efficiently through physical equivalence, enabled by emerging nanotechnology. The architecture builds …
Threat Analysis, Countermeaures And Design Strategies For Secure Computation In Nanometer Cmos Regime, Raghavan Kumar
Threat Analysis, Countermeaures And Design Strategies For Secure Computation In Nanometer Cmos Regime, Raghavan Kumar
Doctoral Dissertations
Advancements in CMOS technologies have led to an era of Internet Of Things (IOT), where the devices have the ability to communicate with each other apart from their computational power. As more and more sensitive data is processed by embedded devices, the trend towards lightweight and efficient cryptographic primitives has gained significant momentum. Achieving a perfect security in silicon is extremely difficult, as the traditional cryptographic implementations are vulnerable to various active and passive attacks. There is also a threat in the form of "hardware Trojans" inserted into the supply chain by the untrusted third-party manufacturers for economic incentives. Apart …
A Continous Rotary Actuation Mechanism For A Powered Hip Exoskeleton, Matthew C. Ryder
A Continous Rotary Actuation Mechanism For A Powered Hip Exoskeleton, Matthew C. Ryder
Masters Theses
This thesis presents a new mechanical design for an exoskeleton actuator to power the sagittal plane motion in the human hip. The device uses a DC motor to drive a Scotch yoke mechanism and series elasticity to take advantage of the cyclic nature of human gait and to reduce the maximum power and control requirements of the exoskeleton. The Scotch yoke actuator creates a position-dependent transmission that varies between 4:1 and infinity, with the peak transmission ratio aligned to the peak torque periods of the human gait cycle. Simulation results show that both the peak and average motor torque can …
Function Verification Of Combinational Arithmetic Circuits, Duo Liu
Function Verification Of Combinational Arithmetic Circuits, Duo Liu
Masters Theses
Hardware design verification is the most challenging part in overall hardware design process. It is because design size and complexity are growing very fast while the requirement for performance is ever higher. Conventional simulation-based verification method cannot keep up with the rapid increase in the design size, since it is impossible to exhaustively test all input vectors of a complex design. An important part of hardware verification is combinational arithmetic circuit verification. It draws a lot of attention because flattening the design into bit-level, known as the bit-blasting problem, hinders the efficiency of many current formal techniques. The goal of …
Design And Implementation Of Digital Information Security For Physical Documents, Pengcheng Wang
Design And Implementation Of Digital Information Security For Physical Documents, Pengcheng Wang
Masters Theses
The objective of this thesis is to improve the security for physical paper documents. Providing information security has been difficult in environments that rely on physical paper documents to implement business processes. Our work presents the design of a digital information security system for paper documents, called "CryptoPaper", that uses 2-dimensional codes to represent data and its security properties on paper. A special scanner system is designed for "CryptoPaper" which uses image recognition techniques and cloud-based access control to display plaintext of encrypted and encoded data to authorized users.
Reliabilibity Aware Thermal Management Of Real-Time Multi-Core Systems, Shikang Xu
Reliabilibity Aware Thermal Management Of Real-Time Multi-Core Systems, Shikang Xu
Masters Theses
Continued scaling of CMOS technology has led to increasing working temperature of VLSI circuits. High temperature brings a greater probability of permanent errors (failure) in VLSI circuits, which is a critical threat for real-time systems. As the multi-core architecture is gaining in popularity, this research proposes an adaptive workload assignment approach for multi-core real-time systems to balance thermal stress among cores. While previously developed scheduling algorithms use temperature as the criterion, the proposed algorithm uses reliability of each core in the system to dynamically assign tasks to cores. The simulation results show that the proposed algorithm gains as large as …
Energy Agile Cluster Communication, Muhammad Zain Mustafa
Energy Agile Cluster Communication, Muhammad Zain Mustafa
Masters Theses
Computing researchers have long focused on improving energy-efficiency?the amount of computation per joule? under the implicit assumption that all energy is created equal. Energy however is not created equal: its cost and carbon footprint fluctuates over time due to a variety of factors. These fluctuations are expected to in- tensify as renewable penetration increases. Thus in my work I introduce energy-agility a design concept for a platform?s ability to rapidly and efficiently adapt to such power fluctuations. I then introduce a representative application to assess energy-agility for the type of long-running, parallel, data-intensive tasks that are both common in data …
Managing And Leveraging Variations And Noise In Nanometer Cmos, Vikram B. Suresh
Managing And Leveraging Variations And Noise In Nanometer Cmos, Vikram B. Suresh
Doctoral Dissertations
Advanced CMOS technologies have enabled high density designs at the cost of complex fabrication process. Variation in oxide thickness and Random Dopant Fluctuation (RDF) lead to variation in transistor threshold voltage Vth. Current photo-lithography process used for printing decreasing critical dimensions result in variation in transistor channel length and width. A related challenge in nanometer CMOS is that of on-chip random noise. With decreasing threshold voltage and operating voltage; and increasing operating temperature, CMOS devices are more sensitive to random on-chip noise in advanced technologies. In this thesis, we explore novel circuit techniques to manage the impact of …