Computer Engineering Commons^™

Quickbooks Self-Employed Ios Application, Braden Young

Computer Science and Software Engineering

No abstract provided.

Study Of Parallel Programming Models On Computer Clusters With Accelerators, Chenggang Lai

Graduate Theses and Dissertations

In order to reach exascale computing capability, accelerators have become a crucial part in developing supercomputers. This work examines the potential of two latest acceleration technologies, Intel Many Integrated Core (MIC) Architecture and Graphics Processing Units (GPUs). This thesis applies three benchmarks under 3 different configurations, MPI+CPU, MPI+GPU, and MPI+MIC. The benchmarks include intensely communicating application, loosely communicating application, and embarrassingly parallel application. This thesis also carries out a detailed study on the scalability and performance of MIC processors under two programming models, i.e., offload model and native model, on the Beacon computer cluster.

According to different benchmarks, the results …

A Deep Search Architecture For Capturing Product Ontologies, Tejeshwar Sangameswaran

Graduate Theses and Dissertations

This thesis describes a method to populate very large product ontologies quickly. We discuss a deep search architecture to text-mine online e-commerce market places and build a taxonomy of products and their corresponding descriptions and parent categories. The goal is to automatically construct an open database of products, which are aggregated from different online retailers. The database contains extensive metadata on each object, which can be queried and analyzed. Such a public database currently does not exist; instead the information currently resides siloed within various organizations. In this thesis, we describe the tools, data structures and software architectures that allowed …

Design And Implementation Of An Instruction Set Architecture And An Instruction Execution Unit For The Rez9 Coprocessor System, Daniel Spencer Anderson

UNLV Theses, Dissertations, Professional Papers, and Capstones

While the use of RNS has provided groundbreaking theory and progress in this field, the applications still lack viable testing platforms to test and verify the theory. This Thesis outlines the processing of developing an instruction set architecture (ISA) and an instruction execution unit (IEU) to help make the first residue based general processor a viable testing platform to address the mentioned problems.

Consider a 32-bit ripple adder. The delay on this device will be 32N where N is the delay for each adder to complete its operation. The delay of this process is due to the need to propagate …

Network-On-Chip Synchronization, Mark Buckler

Masters Theses

Technology scaling has enabled the number of cores within a System on Chip (SoC) to increase significantly. Globally Asynchronous Locally Synchronous (GALS) systems using Dynamic Voltage and Frequency Scaling (DVFS) operate each of these cores on distinct and dynamic clock domains. The main communication method between these cores is increasingly more likely to be a Network-on-Chip (NoC). Typically, the interfaces between these clock domains experience multi-cycle synchronization latencies due to their use of “brute-force” synchronizers. This dissertation aims to improve the performance of NoCs and thereby SoCs as a whole by reducing this synchronization latency.

First, a survey of NoC …

Reliable And Efficient Multithreading, Tongping Liu

Doctoral Dissertations

The advent of multicore architecture has increased the demand for multithreaded programs. It is notoriously far more challenging to write parallel programs correctly and efficiently than sequential ones because of the wide range of concurrency errors and performance problems. In this thesis, I developed a series of runtime systems and tools to combat concurrency errors and performance problems of multithreaded programs. The first system, Dthreads, automatically ensures determinism for unmodified C/C++ applications using the pthreads library without requiring programmer intervention and hardware support. Dthreads greatly simplifies the understanding and debugging of multithreaded programs. Dthreads often matches or even exceeds the …

Parallel Multi-Core Verilog Hdl Simulation, Tariq B. Ahmad

Doctoral Dissertations

In the era of multi-core computing, the push for creating true parallel applications that can run on individual CPUs is on the rise. Application of parallel discrete event simulation (PDES) to hardware design verification looks promising, given the complexity of today’s hardware designs. Unfortunately, the challenges imposed by lack of inherent parallelism, suboptimal design partitioning, synchronization and communication overhead, and load balancing, render this approach largely ineffective. This thesis presents three techniques for accelerating simulation at three levels of abstraction namely, RTL, functional gate-level (zero-delay) and gate-level timing. We review contemporary solutions and then propose new ways of speeding up …

Analysis And Detection Of Heap-Based Malwares Using Introspection In A Virtualized Environment, Salman Javaid

University of New Orleans Theses and Dissertations

Malware detection and analysis is a major part of computer security. There is an arm race between security experts and malware developers to develop various techniques to secure computer systems and to find ways to circumvent these security methods. In recent years process heap-based attacks have increased significantly. These attacks exploit the system under attack via the heap, typically by using a heap spraying attack. The main drawback with existing techniques is that they either consume too many resources or are complicated to implement. Our work in this thesis focuses on new methods which offloads process heap analysis for guest …

A Lean Information Management Model For Efficient Operations Of An Educational Entity At The University Of Tennessee, Harshitha Muppaneni

Masters Theses

A software based Management Information System (MIS) is designed and implemented in the Department of Industrial and Systems Engineering at University of Tennessee to handle different types of data requests that are currently processed through multiple steps. This thesis addresses the current resource intensive data management model in educational institutions and proposes a decentralized and customized solution. The proposed software based data management system provides information to authorized sources in the requested format with minimal or no time consumption. The quantification of the new systems’ impact is done by comparing it with current data management process using Graph Theoretic Approach …

Software Porting Of A 3d Reconstruction Algorithm To Razorcam Embedded System On Chip, Kevin Curtis Gunn

Graduate Theses and Dissertations

A method is presented to calculate depth information for a UAV navigation system from Keypoints in two consecutive image frames using a monocular camera sensor as input and the OpenCV library. This method was first implemented in software and run on a general-purpose Intel CPU, then ported to the RazorCam Embedded Smart-Camera System and run on an ARM CPU onboard the Xilinx Zynq-7000. The results of performance and accuracy testing of the software implementation are then shown and analyzed, demonstrating a successful port of the software to the RazorCam embedded system on chip that could potentially be used onboard a …

Reputation Computation In Social Networks And Its Applications, Jooyoung Lee

Dissertations - ALL

This thesis focuses on a quantification of reputation and presents models which compute reputation within networked environments. Reputation manifests past behaviors of users and helps others to predict behaviors of users and therefore reduce risks in future interactions. There are two approaches in computing reputation on networks- namely, the macro-level approach and the micro-level approach. A macro-level assumes that there exists a computing entity outside of a given network who can observe the entire network including degree distributions and relationships among nodes. In a micro-level approach, the entity is one of the nodes in a network and therefore can only …

System-Wide Performance Analysis For Virtualization, Deron Eugene Jensen

Dissertations and Theses

With the current trend in cloud computing and virtualization, more organizations are moving their systems from a physical host to a virtual server.

Although this can significantly reduce hardware, power, and administration costs, it can increase the cost of analyzing performance problems. With virtualization, there is an initial performance overhead, and as more virtual machines are added to a physical host the interference increases between various guest machines. When this interference occurs, a virtualized guest application may not perform as expected. There is little or no information to the virtual OS about the interference, and the current performance tools in …

Team Omnimouse, Derek J. Halman, Josh B. Porter, Steven A. Silver, Ian S. Stemper

Computer Engineering

INFORMATION, DATA, FIGURES AND DRAWINGS EMBODIED IN THIS DOCUMENT ARE STRICTLY CONFIDENTIAL AND ARE SUPPLIED ON THE UNDERSTANDING THAT THEY WILL NOT BE DISCLOSED TO THIRD PARTIES WITHOUT THE PRIOR WRITTEN CONSENT OF QUALITY OF LIFE PLUS.

Chromium Os On Freescale I.Mx6q, Pushpal Sidhu

Computer Engineering

This projects intention is to get Chromium OS running on a Freescale i.MX6q processor, a processor based on the ARM® Cortex™-A9 architecture. The development board I used is the Ventana GW5400 by Gateworks. This project inherently meant using Chromium OS's development system which meant I created a board specific package for the Ventana single board computer. This project is a proof of concept that can mean extending Chromium OS to various implementations of the ARM® Cortex™-A9 architecture.

Implementing A Robust Data Storage Software System For Cp9, Stuart Andrew Weickgenant

Computer Engineering

This project focuses on the continuation of the CP9 CubeSat project, specifically the software which will be running on the satellite when it goes into space. This project mostly goes into designing a robust system which stores the data collected from the sensors on board CP9, whose purpose is to collect vibrations data from its launch vehicle during its ascent into space, into an easy to analyze system once the data is downlinked to PolySat’s ground station after launch. One other thing this system does is to prevent CP9 from collecting unnecessary data after launch. Testing was done on this …

Design Of Cpu Simulation Software For Armv7 Instruction Set Architecture, Dillon Tellier

Computer Engineering

Simulations have long been a part of the engineering process in both the professional and academic domain. From a pedagogic standpoint, simulations allow students to explore the dynamics of engineering scenarios by controlling variables, taking measurements, and observing behavior which would be difficult or impossible without simulation. One such tool is a CPU simulator used in Cal Poly’s Computer Architecture classes; this software simulates an instruction accurate operation of a computer processor and reports statistics regarding the execution of the supplied compiled machine code. For the last several years Cal Poly’s computer architecture classes have used a previous version of …

Designing A Modular Dsp Core For Real-Time Audio Performance, Kevin Richard Brewer

Computer Engineering

This project provides an overview for building a Digital Signal Processing (DSP) core on a Digilent Nexys2 FPGA board. The DSP core is designed to give Cal Poly students interested in DSP and its applications to audio engineering a usable platform to perform signal processing and analytics. The processes of the DSP core are modular, allowing students to design their own implementations of various adder and multiplier functions. Infinite impulse response (IIR) filters and finite impulse response (FIR) filters using both cascade and parallel implementations are the primary processing tools in the core, and all output can be visually and …

Ecs Game Engine Design, Daniel Masamune Hall

Computer Engineering

Game programming design and organization can be difficult and complicated. To simplify the development process, frameworks with an array of tools and utilities known as game engines are used. The main goal of this project is to explore game engine designs and develop a design for a modular and expandable game engine. The designs covered in this paper are Object Oriented Programing (OOP) and two Entity Component System (ECS). OOP designs, commonly used in computer science, use a hierarchy of objects to share functionality. ECS designs are based off of the concepts Composition over inheritance in which objects contain features …

Optimizing Lempel-Ziv Factorization For The Gpu Architecture, Bryan Ching

Master's Theses

Lossless data compression is used to reduce storage requirements, allowing for the relief of I/O channels and better utilization of bandwidth. The Lempel-Ziv lossless compression algorithms form the basis for many of the most commonly used compression schemes. General purpose computing on graphic processing units (GPGPUs) allows us to take advantage of the massively parallel nature of GPUs for computations other that their original purpose of rendering graphics. Our work targets the use of GPUs for general lossless data compression. Specifically, we developed and ported an algorithm that constructs the Lempel-Ziv factorization directly on the GPU. Our implementation bypasses the …

Decafs: A Modular Distributed File System To Facilitate Distributed Systems Education, Halli Elaine Meth

Master's Theses

Data quantity, speed requirements, reliability constraints, and other factors encourage industry developers to build distributed systems and use distributed services. Software engineers are therefore exposed to distributed systems and services daily in the workplace. However, distributed computing is hard to teach in Computer Science courses due to the complexity distribution brings to all problem spaces. This presents a gap in education where students may not fully understand the challenges introduced with distributed systems. Teaching students distributed concepts would help better prepare them for industry development work.

DecaFS, Distributed Educational Component Adaptable File System, is a modular distributed file system designed …

Regen: Optimizing Genetic Selection Algorithms For Heterogeneous Computing, Scott Kenneth Swinkleb Winkleblack

Master's Theses

GenSel is a genetic selection analysis tool used to determine which genetic markers are informational for a given trait. Performing genetic selection related analyses is a time consuming and computationally expensive task. Due to an expected increase in the number of genotyped individuals, analysis times will increase dramatically. Therefore, optimization efforts must be made to keep analysis times reasonable.

This thesis focuses on optimizing one of GenSel’s underlying algorithms for heterogeneous computing. The resulting algorithm exposes task-level parallelism and data-level parallelism present but inaccessible in the original algorithm. The heterogeneous computing solution, ReGen, outperforms the optimized CPU implementation achieving a …

Virtual Reality Engine Development, Varun Varahamurthy

Master's Theses

With the advent of modern graphics and computing hardware and cheaper sensor and display technologies, virtual reality is becoming increasingly popular in the fields of gaming, therapy, training and visualization. Earlier attempts at popularizing VR technology were plagued by issues of cost, portability and marketability to the general public. Modern screen technologies make it possible to produce cheap, light head-mounted displays (HMDs) like the Oculus Rift, and modern GPUs make it possible to create and deliver a seamless real-time 3D experience to the user. 3D sensing has found an application in virtual and augmented reality as well, allowing for a …

An Enhanced Self-Healing Protection System In Smart Grid: Using Advanced And Intelligent Devices And Applying Hierarchical Routing In Sensor Network Technique, Mohamed Eid Aljahani

Masters Theses

This paper presents a self-healing protection systems were designed using PSCAD software to test and investigate the efficiency of this method. The system was applied on a typical distribution system with loads, buses, and power sources. The availability of advanced and intelligent devices, such as IEDs and PMUs was the trigger to design proficient and accurate self-healing protection systems which are associated with future smart grids. Deploying optimal sensors distributed within the grid could be a suitable method to monitor and control the distribution network. By using a hierarchical clustering communication technique, optimal sensors can work wirelessly and efficiently without …

Ecocar2 Center Stack Development, Westley Logan Harris, Chris Winstead, Nicholas Alexander Cavopol, William Willie Wells, Tate Glick Hawkersmith

Chancellor’s Honors Program Projects

No abstract provided.

Designing Customizable Network-On-Chip With Support For Embedded Private Memory For Multi-Processor System-On-Chips, Azad Fakhari

Graduate Theses and Dissertations

The computer industry's transition to multiprocessor systems on chip (MPSoC) architectures is increasing the need for new scalable high-bandwidth on-chip communication

backbones. Network-on-Chip (NoC) interconnects are gaining interest for serving as the on-chip communication infrastructure. The most important issues to be considered in designing a NoC are topology, routing algorithm, flow control, and buffering and also the trade-offs between performance, power, and area.

This research proposes a custom-designed NoC specifically for MPSoCs on FPGAs. The proposed design allows the communication infrastructure to seamlessly scale as the numbers of processors within the chip increases. The design adds a new level of …

Identification Of Curriculum Content For A Renewable Energy Graduate Degree Program, John R. Haugherty

Morehead State Theses and Dissertations

A Thesis Presented to the Faculty of the College of Science and Technology Morehead State University in Partial Fulfillment of the Requirements for the Degree Master of Science by John R. Haughery on April 24, 2014.

Compacting Loads And Stores For Code Size Reduction, Isaac Asay

Master's Theses

It is important for compilers to generate executable code that is as small as possible, particularly when generating code for embedded systems. One method of reducing code size is to use instruction set architectures (ISAs) that support combining multiple operations into single operations. The ARM ISA allows for combining multiple memory operations to contiguous memory addresses into a single operation. The LLVM compiler contains a specific memory optimization to perform this combining of memory operations, called ARMLoadStoreOpt. This optimization, however, relies on another optimization (ARMPreAllocLoadStoreOpt) to move eligible memory operations into proximity in order to perform properly. This mover optimization …

Twill: A Hybrid Microcontroller-Fpga Framework For Parallelizing Single- Threaded C Programs, Douglas S. Gallatin

Master's Theses

Increasingly System-On-A-Chip platforms which incorporate both micropro- cessors and re-programmable logic are being utilized across several fields ranging from the automotive industry to network infrastructure. Unfortunately, the de- velopment tools accompanying these products leave much to be desired, requiring knowledge of both traditional embedded systems languages like C and hardware description languages like Verilog. We propose to bridge this gap with Twill, a truly automatic hybrid compiler that can take advantage of the parallelism inherent in these platforms. Twill can extract long-running threads from single threaded C code and distribute these threads across the hardware and software domains to more …

Hybrid Data Storage Framework For The Biometrics Domain, Abhinav Tiwari

Electronic Thesis and Dissertation Repository

Biometric based authentication is one of the most popular techniques adopted in large-scale identity matching systems due to its robustness in access control. In recent years, the number of enrolments has increased significantly posing serious issues towards the performance and scalability of these systems. In addition, the use of multiple modalities (such as face, iris and fingerprint) is further increasing the issues related to scalability. This research work focuses on the development of a new Hybrid Data Storage Framework (HDSF) that would improve scalability and performance of biometric authentication systems (BAS). In this framework, the scalability issue is addressed by …

Secure Map Generation For Multiplayer, Turn-Based Strategy Games, Stephen L. Rice

Electronic Theses and Dissertations

In strategy games, players compete against each other on randomly generated maps in an attempt to prove their superior skill. Traditionally, these games rely on a client/server architecture with one player fulfilling the role of server and holding responsibility for the map generation process. We propose, analyze and evaluate a method that allows these maps to be created in a peer-to-peer fashion and thus reduce the potential for cheating. We provide an example map generation program that puts these concepts into action and demonstrate how it can be extended and customized for any game. Finally, we analyze the performance of …