Computer Engineering Commons^™

Design And Implementation Of An Instruction Set Architecture And An Instruction Execution Unit For The Rez9 Coprocessor System, Daniel Spencer Anderson

UNLV Theses, Dissertations, Professional Papers, and Capstones

While the use of RNS has provided groundbreaking theory and progress in this field, the applications still lack viable testing platforms to test and verify the theory. This Thesis outlines the processing of developing an instruction set architecture (ISA) and an instruction execution unit (IEU) to help make the first residue based general processor a viable testing platform to address the mentioned problems.

Consider a 32-bit ripple adder. The delay on this device will be 32N where N is the delay for each adder to complete its operation. The delay of this process is due to the need to propagate …

Proactive Service Migration For Long-Running Byzantine Fault-Tolerant Systems, Wenbing Zhao, H. Zhang

Electrical and Computer Engineering Faculty Publications

A proactive recovery scheme based on service migration for long-running Byzantine fault-tolerant systems is described. Proactive recovery is an essential method for ensuring the long-term reliability of fault-tolerant systems that are under continuous threats from malicious adversaries. The primary benefit of our proactive recovery scheme is a reduced vulnerability window under normal operation. This is achieved in two ways. First, the time-consuming reboot step is removed from the critical path of proactive recovery. Second, the response time and the service migration latency are continuously profiled and an optimal service migration interval is dynamically determined during runtime based on the observed …