Engineering Commons^™

Computationally Efficient, Multi-Domain Hybrid Modeling Of Surface Integrity In Machining And Related Thermomechanical Finishing Processes, Julius M. Schoop, David Adeniji, Ian S. Brown

Mechanical Engineering Faculty Publications

In order to enable more widespread implementation of sophisticated process modeling, a novel, rapidly deployable multi-physics hybrid model of surface integrity in finishing operations is proposed. Rather than modeling detailed chip formation mechanics, as is common in numerical models, the proposed models integrates existing analytical and semi-empirical models of the plastic, elastic, thermal and thermodynamic domains. Using this approach, highly complex surface integrity phenomena such as residual stresses, grain size, phase composition, microhardness profile, etc. can be accurately predicted in a manner of seconds. It is envisioned that this highly efficient modeling scheme will drive new innovations in surface engineering.

Digital Design Of Intralogistics Systems: Flexible And Agile Solution To Short-Cyclic Fluctuations, Anike Murrenhoff, Christoph Pott, Moritz Wernecke, Philipp-Akira Burger

15th IMHRC Proceedings (Savannah, Georgia. USA – 2018)

In times of fast-paced, fluctuating and individual markets, intralogistics systems, such as warehouses, have to adapt to the resulting volatile performance demands dynamically. Hybrid systems, in which humans and machines work together efficiently and communicate in socio-technical networks, can be the answer to manage these high-frequency markets. Hybrid systems of the future need to adapt frequently and permanent change becomes the “new normal”. A one-time planning of warehousing systems upon first installation becomes obsolete. This results in the question of how to design and implement processes for future logistics systems in an agile way in order to exploit the flexibility …

Delay Insensitive Ternary Logic Utilizing Cmos And Cntfet, Ravi Sankar Parameswaran Nair

Graduate Theses and Dissertations

As digital circuit design continues to evolve due to progress of semiconductor processes well into the sub 100nm range, clocked architectures face limitations in a number of cases where clockless asynchronous architectures require substantially less power, generate less noise, and produce less electromagnetic interference (EMI). This dissertation develops the Delay Insensitive Ternary Logic (DITL) asynchronous design paradigm that combines the designs aspects of similar Dual-Rail asynchronous paradigms and Boolean logic to create a single wire per bit, three voltage signaling and logic scheme.

DITL is designed at the transistor level using multi-threshold CMOS and carbon nanotube (CNT) FETs to develop …

A Highly Abstracted Method Of Fpga-Based Development For Secondary Surveillance Radar Transpond Detection, James Penn Watt

Master's Theses

Traditional FPGA-based digital design is based on writing hardware definition language (HDL) code from scratch. Time to market, cost of development, and the level of training required for designers all can be reduced with a simplified and abstracted design strategy. This project intends to demonstrate a graphical user interface (GUI) layer of abstraction on top of existing commercially produced design aids including MATLAB, Simulink, and Xilinx System Generator. This project performs and demonstrates a specific implementation example of a Secondary Surveillance Radar (SSR) message decoder as proof-of-concept for the abstracted design method. The abstracted digital design methods shown in this …

Information Technology And Architectural Practice: Knowledge Modeling Approach And Bim, Ajla Aksamija, Mir Ali

Ajla Aksamija

This paper presents recent developments in information technologies and their impact on architectural design. It presents a practical technique for knowledge-based information modeling extending the currently prevailing Building Information Modelling (BIM) to include information beyond the building elements, and to foster analysis during the design process. Interactive web-based application for information discovery and design analysis is discussed as a case study. The application integrates several aspects of the early schematic design, and is intended for demonstration of integrated design factors.

Reducing Power In Fpga Designs Through Glitch Reduction, Nathaniel Hatley Rollins

Theses and Dissertations

While FPGAs provide flexibility for performing high performance DSP functions, they consume a significant amount of power. Often, a large portion of the dynamic power is wasted on unproductive signal glitches. Reducing glitching reduces dynamic energy consumption. In this study, retiming is used to reduce the unproductive energy wasted in signal glitches. Retiming can reduce energy by up to 92%. Evaluating energy consumption is an important part of energy reduction. In this work, an activity rate-based power estimation tool is introduced to provide FPGA architecture independent energy estimations at the gate level. This tool can accurately estimate power consumption to …

An Introductory Digital Design Course Using A Low–Cost Autonomous Robot, Tyson S. Hall, Kimberly E. Newman, James O. Hamblen

Faculty Works

This paper describes a new digital design laboratory developed for undergraduate students in this electrical and computer engineering curriculum. A top-down rapid prototyping approach with commercial computer-aided design tools and field-programmable logic devices (FPLDs) is used for laboratory projects. Students begin with traditional transistor–transistor logic-based projects containing a few gates and progress to designing a simple 16-bit computer, using very high-speed integrated circuits hardware description language (VHDL) synthesis tools and an FPLD. To help motivate students, the simple computer design is programmed to control a small autonomous robot with two servo drive motors and several sensors. The laboratory concludes with …