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Full-Text Articles in Engineering
Improving The Single Event Effect Response Of Triple Modular Redundancy On Sram Fpgas Through Placement And Routing, Matthew Joel Cannon
Improving The Single Event Effect Response Of Triple Modular Redundancy On Sram Fpgas Through Placement And Routing, Matthew Joel Cannon
Theses and Dissertations
Triple modular redundancy (TMR) with repair is commonly used to improve the reliability of systems. TMR is often employed for circuits implemented on field programmable gate arrays (FPGAs) to mitigate the radiation effects of single event upsets (SEUs). This has proven to be an effective technique by improving a circuit's sensitive cross-section by up to 100x. However, testing has shown that the improvement offered by TMR is limited by upsets in single configuration bits that cause TMR to fail.This work proposes a variety of mitigation techniques that improve the effectiveness of TMR on FPGAs. These mitigation techniques can alter the …
Optimization And Hardware Implementation Of Syba-An Efficient Feature Descriptor, Samuel Gaylin Fuller
Optimization And Hardware Implementation Of Syba-An Efficient Feature Descriptor, Samuel Gaylin Fuller
Theses and Dissertations
Feature detection, description and matching are crucial steps in many computer vision algorithms. These rely on feature descriptors to be able to match image features across sets of images. This paper discusses a hardware implementation and various optimizations of our lab's previous work on the SYnthetic BAsis feature descriptor (SYBA). Previous work has shown that SYBA can offer superior performance to other binary descriptors, such as BRIEF. This hardware implementation on an FPGA is a high throughput and low latency solution, which is critical for applications such as: high speed object detection and tracking, stereo vision, visual odometry, structure from …
Neutron Beam Testing Methodology And Results For A Complex Programmable Multiprocessor Soc, Jordan Daniel Anderson
Neutron Beam Testing Methodology And Results For A Complex Programmable Multiprocessor Soc, Jordan Daniel Anderson
Theses and Dissertations
The Xilinx Multiprocessor System-on-Chip (MPSoC) is a complex device that uses 16nm FinFET technology to combine multiple processors, a large amount of FPGA resources, and many I/O interfaces on a single chip die. These features make the MPSoC a high-performance and architecturally flexible device. The potential computing power makes the MPSoC ideal for many embedded applications including terrestrial and space applications. The MPSoC, however, does not have extensive radiation history as many other devices have. The extent of the effect that ionized particles may have on the MPSoC is not well established. To solve this problem, neutron radiation testing can …