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High-Frequency Wide-Range All Digital Phase Locked Loop In 90nm Cmos, Prashanth Muppala

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This thesis presents a high-frequency wide tuning range all digital phase locked loop (ADPLL) in 90 nm CMOS process with 1.2 V power supply. It operates in the frequency range of 2-7.2 GHz with wide linearity and high resolution. The ADPLL uses a wide frequency range digital controlled oscillator (DCO) and averaging technique to obtain fast lock time. The operation of the ADPLL includes both a frequency acquisition state and a phase acquisition state. A novel architecture is implemented in a coarse stage to obtain a monotonically increasing wide frequency range DCO for frequency acquisition and a fine control stage …