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Power Efficient Continuous-Time Delta-Sigma Modulator Architectures For Wideband Analog To Digital Conversion, Mohammad Ranjbar
Power Efficient Continuous-Time Delta-Sigma Modulator Architectures For Wideband Analog To Digital Conversion, Mohammad Ranjbar
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This work presents novel continuous-time delta-sigma modulator architectures with low-power consumption and improved signal transfer functions which are suitable for wideband A/D conversion in wireless applications, e.g., 3G and 4G receivers. The research has explored two routes for improving the overall performance of continuous-time delta-sigma modulator. The first part of this work proposes the use of the power efficient Successive-Approximations (SAR) architecture, instead of the conventional Flash ADC, as the internal quantizer of the delta-sigma modulator. The SAR intrinsic latency has been addressed by means of a faster clock for the quantizer as well as full-period delay compensation. The use …