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Engineering Commons

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Electrical and Computer Engineering Faculty Research & Creative Works

EMI

1998

Articles 1 - 3 of 3

Full-Text Articles in Engineering

Incorporating Vertical Discontinuities In Power-Bus Modeling Using A Mixed-Potential Integral Equation And Circuit Extraction Formulation, Jun Fan, Hao Shi, James L. Drewniak, Todd H. Hubing, Richard E. Dubroff, Thomas Van Doren Oct 1998

Incorporating Vertical Discontinuities In Power-Bus Modeling Using A Mixed-Potential Integral Equation And Circuit Extraction Formulation, Jun Fan, Hao Shi, James L. Drewniak, Todd H. Hubing, Richard E. Dubroff, Thomas Van Doren

Electrical and Computer Engineering Faculty Research & Creative Works

Noise on the DC power-bus attributed to device switching is among the primary sources of EMI and signal integrity problems. A mixed-potential integral equation formulation with circuit extraction approach is used to model the planar multi-layer power-bus geometry, which can also include arbitrary shaped power regions on multiple layers. Incorporating vertical discontinuities, e.g., decoupling capacitor interconnects, is a critical aspect of the modeling, and must be done properly since they are included as a lumped element model and not a part of the MPIE formulation. Agreement with experimental results demonstrate the present approach.


An Impact Of Layer Stack-Up On Emi, S. Radu, Theodore M. Zeeff, Joe Nuebel, James L. Drewniak, Todd H. Hubing, Thomas Van Doren Aug 1998

An Impact Of Layer Stack-Up On Emi, S. Radu, Theodore M. Zeeff, Joe Nuebel, James L. Drewniak, Todd H. Hubing, Thomas Van Doren

Electrical and Computer Engineering Faculty Research & Creative Works

Investigation of a server shows the heatsink of the CPU module as a primary component of the EMI coupling path. In order to identify the specific noise source and coupling path to the heatsink, a series of experiments were defined to provide support for one source and eliminate others. Based on experiments with two different versions of the CPU module, a stack-up related design guideline is proposed: a ground layer should be the first entire plane (as opposed to Vcc) on the active component side of the board. If there are known IC sources that switch significant currents …


Design Of Airflow Aperture Arrays In Shielding Enclosures, Min Li, S. Radu, J. Neubel, James L. Drewniak, Todd H. Hubing, Thomas Van Doren Aug 1998

Design Of Airflow Aperture Arrays In Shielding Enclosures, Min Li, S. Radu, J. Neubel, James L. Drewniak, Todd H. Hubing, Thomas Van Doren

Electrical and Computer Engineering Faculty Research & Creative Works

EMI through perforation patterns for airflow in shielding enclosures resulting from coupling of interior sources is investigated numerically with FDTD simulations and experimentally. The FDTD simulations are compared with measurements on perforation patterns. A simple empirical design approach for the relation between aperture size, the number of apertures and shielding effectiveness is extracted. A double perforation pattern structure is proposed for perforation pattern designs where a high percentage of open area is required. Frequencies where the enclosure will support cavity modes are of primary concern.