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Utah State University

Electrical and Computer Engineering Faculty Publications

2024

Timing errors

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Full-Text Articles in Engineering

Understanding Timing Error Characteristics From Overclocked Systolic Multiply–Accumulate Arrays In Fpgas, Andrew Chamberlin, Andrew Gerber, Mason Palmer, Tim Goodale, Noel Daniel Gundi, Koushik Chakraborty, Sanghamitra Roy Jan 2024

Understanding Timing Error Characteristics From Overclocked Systolic Multiply–Accumulate Arrays In Fpgas, Andrew Chamberlin, Andrew Gerber, Mason Palmer, Tim Goodale, Noel Daniel Gundi, Koushik Chakraborty, Sanghamitra Roy

Electrical and Computer Engineering Faculty Publications

Artificial Intelligence (AI) hardware accelerators have seen tremendous developments in recent years due to the rapid growth of AI in multiple fields. Many such accelerators comprise a Systolic Multiply–Accumulate Array (SMA) as its computational brain. In this paper, we investigate the faulty output characterization of an SMA in a real silicon FPGA board. Experiments were run on a single Zybo Z7-20 board to control for process variation at nominal voltage and in small batches to control for temperature. The FPGA is rated up to 800 MHz in the data sheet due to the max frequency of the PLL, but the …