Engineering Commons^™

Energy Efficient Network-On-Chip Architectures For Many-Core Near-Threshold Computing System, Chidhambaranathan Rajamanikkam, Jayashankara S. Rajesh, Koushik Chakraborty, Meher Samineni

Electrical and Computer Engineering Faculty Publications

Near threshold computing has unraveled a promising design space for energy efficient computing. However, it is still plagued by sub-optimal system performance. Application characteristics and hardware non-idealities of conventional architectures (those optimized for nominal voltage) prevent us from fully leveraging the potential of NTC systems. Increasing the computational core count still forms the bedrock of a multitude of contemporary works that address the problem of performance degradation in NTC systems. However, these works do not categorically address the shortcomings of the conventional on-chip interconnect fabric in a many core environment. In this work, we quantitatively demonstrate the performance bottleneck created …