Engineering Commons^™

Hci-Tolerant Noc Router Microarchitecture, Dean Michael Ancajas, James Mccabe Nickerson, Koushik Chakraborty, Sanghamitra Roy

Electrical and Computer Engineering Faculty Publications

The trend towards massive parallel computing has necessitated the need for an On-Chip communication framework that can scale well with the increasing number of cores. At the same time, technology scaling has made transistors susceptible to a multitude of reliability issues (NBTI, HCI, TDDB). In this work, we propose an HCI-Tolerant microarchitecture for an NoC Router by manipulating the switching activity around the circuit. We find that most of the switch- ing activity (the primary cause of HCI degradation) are only concentrated in a few parts of the circuit, severely degrading some portions more than others. Our techniques increase the …