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Electronic Devices and Semiconductor Manufacturing

Theses/Dissertations

2015

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Full-Text Articles in Engineering

Interface And Morphology Engineering In Solution-Processed Electronic And Optoelectronic Devices, Sanjib Das Dec 2015

Interface And Morphology Engineering In Solution-Processed Electronic And Optoelectronic Devices, Sanjib Das

Doctoral Dissertations

The first part of this dissertation focuses on interface and morphology engineering in polymer- and small molecule-based organic solar cells. High-performance devices were fabricated, and the device performance was correlated with nanoscale structures using various electrical, spectroscopic and microscopic characterization techniques, providing guidelines for high-efficiency cell design.

The second part focuses on perovskite solar cells (PSCs), an emerging photovoltaic technology with skyrocketing rise in power conversion efficiency (PCE) and currently showing comparable PCEs with those of existing thin film photovoltaic technologies such as CIGS and CdTe. Fabrication of large-area PSCs without compromising reproducibility and device PCE requires formation of dense, …


Mohat Tool To Illustrate Diode And Transistor Modes Of Operation Using Ltspice, Getu D. Engdaw Dec 2015

Mohat Tool To Illustrate Diode And Transistor Modes Of Operation Using Ltspice, Getu D. Engdaw

Electrical Engineering

This project develops a tool to identify the modes of operation of diodes and transistors in a circuit. The MoHAT tool receives schematics or circuit files generated from LTspice, and it determines the state of each diode and transistor. This tool illustrates diodes, BJT and MOS regions of operations using text or graphics accordingly. The tool also suggests necessary adjustments to switch from one mode of operation to another upon users request. Furthermore, the tool specifies if a transistor functions in amplification region. The MoHAT tool compares the nodal voltages of an element and determines the mode of operation.


High Temperature Silicon Carbide Mixed-Signal Circuits For Integrated Control And Data Acquisition, Ashfaqur Rahman Dec 2015

High Temperature Silicon Carbide Mixed-Signal Circuits For Integrated Control And Data Acquisition, Ashfaqur Rahman

Graduate Theses and Dissertations

Wide bandgap semiconductor materials such as gallium nitride (GaN) and silicon carbide have grown in popularity as a substrate for power devices for high temperature and high voltage applications over the last two decades. Recent research has been focused on the design of integrated circuits for protection and control in these wide bandgap materials. The ICs developed in SiC and GaN can not only complement the power devices in high voltage and high frequency applications, but can also be used for standalone high temperature control and data acquisition circuitry.

This dissertation work aims to explore the possibilities in high temperature …


A Feed Forward Circuit For Jitter Attenuation On High-Speed Digital Signals, Eric Rule Dec 2015

A Feed Forward Circuit For Jitter Attenuation On High-Speed Digital Signals, Eric Rule

Electrical Engineering

In the age of high-speed digital circuitry, there exists a need for clean, precise clock signals. In generating and distributing clock signals throughout a circuit, unwanted jitter can become a serious issue. A common technique for attenuating jitter uses phase-locked-loops to treat the signal, but as the clock frequency increases, so does the cost and complexity of the designs. Following the research completed by Dr. Tina Smilkstein [1], this project examines a purely feed-forward technique for attenuating jitter that is low-complexity and robust, and aims to design an integrated circuit that implements the technique.


Skybridge: A New Nanoscale 3-D Computing Framework For Future Integrated Circuits, Mostafizur Rahman Nov 2015

Skybridge: A New Nanoscale 3-D Computing Framework For Future Integrated Circuits, Mostafizur Rahman

Doctoral Dissertations

Continuous scaling of CMOS has been the major catalyst in miniaturization of integrated circuits (ICs) and crucial for global socio-economic progress. However, continuing the traditional way of scaling to sub-20nm technologies is proving to be very difficult as MOSFETs are reaching their fundamental performance limits [1] and interconnection bottleneck is dominating IC operational power and performance [2]. Migrating to 3-D, as a way to advance scaling, has been elusive due to inherent customization and manufacturing requirements in CMOS architecture that are incompatible with 3-D organization. Partial attempts with die-die [3] and layer-layer [4] stacking have their own limitations [5]. We …


Alternating Current Electrokinetics Based Capacitive Affinity Biosensor: A Point-Of-Care Diagnostic Platform, Haochen Cui Aug 2015

Alternating Current Electrokinetics Based Capacitive Affinity Biosensor: A Point-Of-Care Diagnostic Platform, Haochen Cui

Doctoral Dissertations

Capacitive bioaffinity detection using microelectrodes is considered as a promising label-free method for point-of-care diagnosis, though with challenges in sensitivity, specificity and the time “from sample to result.” This work presents an alternating current (AC)-electrokinetic based capacitive affinity sensing method that is capable of realizing rapid in-situ detection of specific biomolecular interactions such as probe-analyte binding. The capacitive biosensor presented here employs elevated AC potentials at a fixed frequency for impedimetric interrogation of the microelectrodes. Such an AC signal is capable of inducing dielectrophoresis (DEP) and AC electrothermal (ACET) effects, so as to realize in-situ enrichment of macro and even …


Common Mode Voltage Mitigation Strategies Using Pwm In Neutral-Point-Clamped Multilevel Inverters, Chad Alexander Somogyi Jul 2015

Common Mode Voltage Mitigation Strategies Using Pwm In Neutral-Point-Clamped Multilevel Inverters, Chad Alexander Somogyi

Master's Theses (2009 -)

Over the last several decades, there has been consistent growth in the research and development of multilevel voltage-source inverter-based adjustable speed motor drives (ASDs) as a result of low cost, high reliability power semiconductors. The three-level neutral-point-clamped (NPC) ASD is a popular multilevel inverter used in low and medium voltage applications because of its ability to produce lower levels of total harmonic distortion (THD) and withstand higher voltages while preserving the rated output power compared to two-level ASDs. As with other voltage-source inverters, three-level NPC ASDs produce common-mode voltage (CMV) that can cause motor shaft voltages, bearing currents, and excess …


Design, Fabrication, And Measurement Of A Multiple-Input Multiple-Output (Mimo) Antenna For Mobile Communication, Christopher Charles Arnold Jul 2015

Design, Fabrication, And Measurement Of A Multiple-Input Multiple-Output (Mimo) Antenna For Mobile Communication, Christopher Charles Arnold

Graduate Theses and Dissertations

This thesis presents the design, fabrication and characterization of a multiband uniplanar MIMO antenna for hand-held mobile communication devices on LTE, WLAN, and WMAN networks. The antenna design methodology combined a variety of broadbanding techniques that resulted in a single-layer hybrid monopole antenna coupled to a meander line element and parasitic structures. The 115×55×1.54 mm antenna was fabricated using an FR4 composite material and occupies only a fractional volume within the size of an average cellular phone allowing ample space to integrate with existing hardware. Characterization of the MIMO antenna included input impedance, scattering parameters and radiation pattern cross sections …


Characterization Of Two Vernier-Tuned Distributed Bragg Reflector (Vt-Dbr) Lasers Used In Swept Source Optical Coherence Tomography (Ss-Oct), Greg M. Bergdoll Jun 2015

Characterization Of Two Vernier-Tuned Distributed Bragg Reflector (Vt-Dbr) Lasers Used In Swept Source Optical Coherence Tomography (Ss-Oct), Greg M. Bergdoll

Master's Theses

Insight Photonic Solutions Inc. has continued to develop their patented VT-DBR laser design; these wavelength tunable lasers promise marked image-quality and acquisition time improvements in SS-OCT applications.

To be well suited for SS-OCT, tunable lasers must be capable of producing a highly linear wavelength sweep across a tuning range well-matched to the medium being imaged; many different tunable lasers used in SS-OCT are compared to identify the optimal solution.

This work electrically and spectrally characterizes two completely new all-semiconductor VT-DBR designs to compare, as well. The Neptune VT-DBR, an O-band laser, operates around the 1310 nm range and is a …


Phase Locked Loop Integrated Circuit, Scott Buchanan, Jonathan Bonello Jun 2015

Phase Locked Loop Integrated Circuit, Scott Buchanan, Jonathan Bonello

Electrical Engineering

No abstract provided.


Chipper: Capacitive Bed Occupancy Sensing For An Intelligent Alarm Clock, David Levi Jun 2015

Chipper: Capacitive Bed Occupancy Sensing For An Intelligent Alarm Clock, David Levi

Electrical Engineering

What if your alarm clock knew when you got out—and stayed out—of bed? Current alarm clocks happily let you go back to bed after turning them off. In this project, I build an alarm which only stops ringing when you get out bed, and starts ringing again if you lie back in bed.

This project uses capacitance to detect bed occupancy. A person on or near the bed creates a tiny, picofarads level increase in capacitance, as seen by a sensor placed under the mattress. A microprocessor interprets this signal, and also drives an audio alarm. Shielding of the sensor …


Design And Fabrication Techniques Of Devices For Embedded Power Active Contact Lens, Errol Heradio Leon Jun 2015

Design And Fabrication Techniques Of Devices For Embedded Power Active Contact Lens, Errol Heradio Leon

Master's Theses

This thesis designed and fabricated various devices that were interfaced to an IC for an active contact lens that notifies the user of an event by detection of an external wireless signal. The contact lens consisted of an embedded antenna providing communication with a 2.4GHz system, as well as inductive charging at an operating frequency of 13.56 MHz. The lens utilized a CBC005 5µAh thin film battery by Cymbet and a manufactured graphene super capacitor as a power source. The custom integrated circuit (IC) was designed using the On Semiconductor CMOS C5 0.6 µm process to manage …


Design Of Integrated Current Reference Circuits For A 180-Nanometer Bicmos Silicon Process, Timothy Max Megee May 2015

Design Of Integrated Current Reference Circuits For A 180-Nanometer Bicmos Silicon Process, Timothy Max Megee

Electrical Engineering Undergraduate Honors Theses

The goal of this thesis is to provide design analysis, simulation results, and physical layout structure for three current references that are to be physically fabricated in a 180- nanometer BICMOS silicon process. The report briefly discusses the need for voltage and current references in analog circuit applications, before zooming in to examine three topologies being tailored to the needs of an integrated solar micro-inverter system. These topologies are: proportional to absolute temperature (PTAT), complementary to absolute temperature (CTAT), and constant across temperature (Constant) bias circuits. First, each topology is designed schematically to meet the needs of the micro-inverter system. …


Environmental Reliability Of Thin Film Sealing On Thick Film Ltcc, Charles R. Bourland May 2015

Environmental Reliability Of Thin Film Sealing On Thick Film Ltcc, Charles R. Bourland

Graduate Theses and Dissertations

As electronic components and systems become more intricate and expand into new realms of use case scenarios, new materials systems must be explored. With new systems comes the balancing acts of cost and reliability. Presented here is a thesis that explores a new hybrid-electronics packaging system using low temperature co-fired ceramics, referred to as LTCC. An LTCC system was designed to explore the environmental reliability of numerous thick film LTCC features and parameters. A key element was to explore how a thin film metallization stack up used to cap or seal underlying thick film structures would decrease environmental susceptibility while …


Single-Walled Carbon Nanotube Arrays For High Frequency Applications, Asmaa Elkadi May 2015

Single-Walled Carbon Nanotube Arrays For High Frequency Applications, Asmaa Elkadi

Graduate Theses and Dissertations

This dissertation presents a thorough analysis of semiconducting Single-Walled Carbon Nanotube-based devices, followed by a test structure fabrication and measurements.

The analysis starts by developing an individual nanotube model, which is then generalized for many nanotubes and adding the parasitic elements. The parasitic elements appear when forming the device electrodes degrade the overall performance.

The continuum model of an individual nanotube is developed. A unique potential function is presented to effectively describe the electron distribution in the carbon nanotube subsequently facilitating solving Schrödinger's equation to obtain the energy levels, and to generalize the model for many nanotubes.

It is shown …


Hand Pattern Recognition Using Smart Band, Theerth Raj Munusamy May 2015

Hand Pattern Recognition Using Smart Band, Theerth Raj Munusamy

Graduate Theses and Dissertations

The Importance of gesture recognition has widely spread around the world. Many research strategies have been proposed to study and recognize gestures, especially facial and hand gestures. Distinguishing and recognizing hand gestures is vital in hotspot fields such as bionic parts, powered exoskeleton, diagnosing muscle disorders, etc. Recognizing such gesture patterns can also create a stress-free and fancy user interface for mobile phones, gaming consoles and other such devices.

The objective is to design a simple yet efficient wearable hand gesture recognizing system. This thesis also shows that by taking both EMG and accelerometer data into account, can improve the …


Characterization Of Silicon Phosphorus Alloy For Device Applications, Larry C. Cousar May 2015

Characterization Of Silicon Phosphorus Alloy For Device Applications, Larry C. Cousar

Graduate Theses and Dissertations

A new material of highly-phosphorus doped silicon for device applications was characterized and analyzed for new material properties. Devices such as NMOS transistors and other CMOS compatible devices may benefit from new materials that reduce external resistances and increase drive currents.

Material characterization requires numerous techniques and technologies to determine electrical, optical, and physical characteristics. For this work, Hall measurement, X-ray Diffraction, Raman Spectroscopy, Photoluminescence Characterization, and Spectroscopic Ellipsometry were used to better understand this new material. The results may lead to new models for silicon phosphorus alloys.


Organic Solar Cell At Room Temperature, Deedra Zeeh Apr 2015

Organic Solar Cell At Room Temperature, Deedra Zeeh

Thinking Matters Symposium Archive

Organic electronics have become of great interest in the field of materials science research due to the potential for flexible electronic devices and low cost technologies. Difficulties emerge with creating a stable and efficient device, while still maintaining a simple and room-temperature production process.

With the advent of relatively stable organic semiconductors and graphene (or other nanotube or fullerene morphologies), it is possible to fabricate photovoltaic cells at near room temperature. By stacking these cells, devices of reasonable efficiencies >5% can be fabricated. Devices were created with a perylene-P3HT photoactive layer, polyaniline buffer layer, and PEDOT:PSS as the hole transport …


Subtractive Plasma-Assisted-Etch Process For Developing High Performance Nanocrystalline Zinc-Oxide Thin-Film-Transistors, Thomas M. Donigan Mar 2015

Subtractive Plasma-Assisted-Etch Process For Developing High Performance Nanocrystalline Zinc-Oxide Thin-Film-Transistors, Thomas M. Donigan

Theses and Dissertations

Thin-Film-Transistors (TFTs) employing undoped zinc-oxide (ZnO) thin-films are currently being investigated by the Air Force for microwave switching applications. Since the on-resistance (R(on)) of the device scales with channel length (LC), ZnO TFT optimization should be focused on reducing LC, therefore minimizing the associated insertion losses. In this research, deep sub-micron scaling of ZnO TFTs was undertaken using a subtractive reactive-ion-etch (RIE) process. Under optimum processing conditions, ZnO TFTs with LC as small as 155 nm were successfully demonstrated. The active ZnO channels of the TFTs were patterned by selective SF6-RIE of a tungsten ohmic film through electron-beam defined openings …


Architecting Np-Dynamic Skybridge, Jiajun Shi Mar 2015

Architecting Np-Dynamic Skybridge, Jiajun Shi

Masters Theses

With the scaling of technology nodes, modern CMOS integrated circuits face severe fundamental challenges that stem from device scaling limitations, interconnection bottlenecks and increasing manufacturing complexities. These challenges drive researchers to look for revolutionary technologies beyond the end of CMOS roadmap. Towards this end, a new nanoscale 3-D computing fabric for future integrated circuits, Skybridge, has been proposed [1]. In this new fabric, core aspects from device to circuit style, connectivity, thermal management and manufacturing pathway are co-architected in a 3-D fabric-centric manner.

However, the Skybridge fabric uses only n-type transistors in a dynamic circuit style for logic and memory …


Architecting Skybridge-Cmos, Mingyu Li Mar 2015

Architecting Skybridge-Cmos, Mingyu Li

Masters Theses

As the scaling of CMOS approaches fundamental limits, revolutionary technology beyond the end of CMOS roadmap is essential to continue the progress and miniaturization of integrated circuits. Recent research efforts in 3-D circuit integration explore pathways of continuing the scaling by co-designing for device, circuit, connectivity, heat and manufacturing challenges in a 3-D fabric-centric manner. SkyBridge fabric is one such approach that addresses fine-grained integration in 3-D, achieves orders of magnitude benefits over projected scaled 2-D CMOS, and provides a pathway for continuing scaling beyond 2-D CMOS.

However, SkyBridge fabric utilizes only single type transistors in order to reduce manufacture …


Development Of Infrared And Terahertz Bolometers Based On Palladium And Carbon Nanotubes Using Roll To Roll Process, Amulya Gullapalli Mar 2015

Development Of Infrared And Terahertz Bolometers Based On Palladium And Carbon Nanotubes Using Roll To Roll Process, Amulya Gullapalli

Masters Theses

Terahertz region in the electromagnetic spectrum is the region between Infrared and Microwave. As the Terahertz region has both wave and particle nature, it is difficult to make a room temperature, fast, and sensitive detector in this region. In this work, we fabricated a Palladium based IR detector and a CNT based THz bolometer.

In Chapter 1, I give a brief introduction of the Terahertz region, the detectors already available in the market and different techniques I can use to test my detector. In Chapter 2, I explain about the Palladium IR bolometer, the fabrication technique I have used, and …


Nanostructured Semiconductor Device Design In Solar Cells, Hongmei Dang Jan 2015

Nanostructured Semiconductor Device Design In Solar Cells, Hongmei Dang

Theses and Dissertations--Electrical and Computer Engineering

We demonstrate the use of embedded CdS nanowires in improving spectral transmission loss and the low mechanical and electrical robustness of planar CdS window layer and thus enhancing the quantum efficiency and the reliability of the CdS-CdTe solar cells. CdS nanowire window layer enables light transmission gain at 300nm-550nm. A nearly ideal spectral response of quantum efficiency at a wide spectrum range provides an evidence for improving light transmission in the window layer and enhancing absorption and carrier generation in absorber. Nanowire CdS/CdTe solar cells with Cu/graphite/silver paste as back contacts, on SnO2/ITO-soda lime glass substrates, yield the …


Investigation Of Gate Dielectric Materials And Dielectric/Silicon Interfaces For Metal Oxide Semiconductor Devices, Lei Han Jan 2015

Investigation Of Gate Dielectric Materials And Dielectric/Silicon Interfaces For Metal Oxide Semiconductor Devices, Lei Han

Theses and Dissertations--Electrical and Computer Engineering

The progress of the silicon-based complementary-metal-oxide-semiconductor (CMOS) technology is mainly contributed to the scaling of the individual component. After decades of development, the scaling trend is approaching to its limitation, and there is urgent needs for the innovations of the materials and structures of the MOS devices, in order to postpone the end of the scaling. Atomic layer deposition (ALD) provides precise control of the deposited thin film at the atomic scale, and has wide application not only in the MOS technology, but also in other nanostructures. In this dissertation, I study rapid thermal processing (RTP) treatment of thermally grown …