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Full-Text Articles in Engineering

Switched-Capacitor Voltage Doubler Design Using 0.5 Μm Technology, Hanfeng Wang Jan 2014

Switched-Capacitor Voltage Doubler Design Using 0.5 Μm Technology, Hanfeng Wang

Theses

While integrated circuit (IC) power management has been an eternal topic for chip designers, inductor based DC-DC converters have been dominant in the field for years. However, because of the natures of inductors: large electro-magnetic interference, high coupling noise, and difficult silicon fabrication process, they are not favorable to on-chip solutions. Switched-capacitor (SC) DC-DC converters, which adopt capacitors for their energy storage components, have become increasingly popular among both the academia and the industry, because, apparently, they avoid the drawbacks of the inductor counterparts, and can be directly implemented on-chip without additional fabrication process.

In this paper, we will investigate …


Comprehensive Mapping And Benchmarking Of Esaki Diode Performance, David John Pawlik Aug 2013

Comprehensive Mapping And Benchmarking Of Esaki Diode Performance, David John Pawlik

Theses

The tunneling-FET (TFET) has been identified as a prospective MOSFET replacement technology with the potential to extend geometric and electrostatic scaling of digital integrated circuits. However, experimental demonstrations of the TFET have yet to reliably achieve drive currents necessary to power large scale integrated circuits. Consequentially, much effort has gone into optimizing the band-to-band tunneling (BTBT) efficiency of the TFET. In this work, the Esaki tunnel diode (ETD) is used as a short loop element to map and optimize BTBT performance for a large design space. The experimental results and tools developed for this work may be used to (1) …


Fpga Hardware Accelerators - Case Study On Design Methodologies And Trade-Offs, Matthew V. Ryan Jun 2013

Fpga Hardware Accelerators - Case Study On Design Methodologies And Trade-Offs, Matthew V. Ryan

Theses

Previous research has shown that the performance of any computation is directly related to the architecture on which it is performed. As a result, the performance of compute intensive applications can be improved using heterogeneous systems. These systems consist of various processor architectures such as CPU, FPGA, DSP, and GPU. Individual computations can be performed in parallel on different processor architecrues within the heterogeneous system. Computations are performed by utilizing existing designs from implementation libraries. There is a lack of FPGA accelerators for use in these libraries and as such additional implementations need to be designed.

Different design methodologies for …