Engineering Commons^™

Optimization Of Reactive Ion Etching (Rie) Parameters For Selective Removal Of Mosfet Gate Dielectric And Evaluation Of Its Physical And Electrical Properties, Hojoon Lee, Samuel Wood

Journal of Undergraduate Research at Minnesota State University, Mankato

The integrated circuit (IC) is dominated by technology using Complementary Metal-oxide-Semiconductor Field-effect Transistor (CMOSFET). In order to put over 300 million transistors on silicon chip requires selective removal of material by Reactive Ion Etching (RIE) which ensures vertical cut thereby increasing packing density of devices on the chip. The gate insulator of CMOS devices plays a crucial role in its electrical performance. In this research gate insulator of MOSFET has been etched by state-of-art technique RIE and its physical and electrical properties have been measured. The gate insulator etching by RIE give rise to charge accumulation on the gate dielectric …