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- Ion Implantation (2)
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Articles 1 - 6 of 6
Full-Text Articles in Engineering
Implementation Of Strategies To Improve The Reliability Of Iii-Nitride Photodetectors Towards The Realization Of Visible And Solar-Blind Imaging Arrays, John Bulmer
Legacy Theses & Dissertations (2009 - 2024)
Ultraviolet (UV) radiation detectors are being heavily researched for applications in non-line-of-sight (NLOS) communication systems, flame monitoring, biological detection, and astronomical studies. These applications are currently being met by the use of Si-based photomultiplier tubes (PMTs), which are bulky, fragile, expensive and require the use of external filters to achieve true visible-blind and solar-blind operation.
Extraction Of Carrier Mobility And Interface Trap Density In Ingaas Metal Oxide Semiconductor Structures Using Gated Hall Method, Thenappan Chidambaram
Extraction Of Carrier Mobility And Interface Trap Density In Ingaas Metal Oxide Semiconductor Structures Using Gated Hall Method, Thenappan Chidambaram
Legacy Theses & Dissertations (2009 - 2024)
III-V semiconductors are potential candidates to replace Si as a channel material in next generation CMOS integrated circuits owing to their superior carrier mobilities. Low density of states (DOS) and typically high interface and border trap densities (Dit) in high mobility group III-V semiconductors provide difficulties in quantification of Dit near the conduction band edge. The trap response above the threshold voltage of a MOSFET can be very fast, and conventional Dit extraction methods, based on capacitance/conductance response (CV methods) of MOS capacitors at frequencies <1MHz, cannot distinguish conducting and trapped carriers. In addition, the CV methods have to deal with high dispersion in the accumulation region that makes it a difficult task to measure the true oxide capacitance, Cox value. Another implication of these properties of III-V interfaces is an ambiguity of determination of electron density in the MOSFET channel. Traditional evaluation of carrier density by integration of the C-V curve, gives incorrect values for Dit and mobility. Here we employ gated Hall method to quantify the Dit spectrum at the high-κ oxide/III-V semiconductor interface for buried and surface channel devices using Hall measurement and capacitance-voltage data. Determination of electron density directly from Hall measurements allows for obtaining true mobility values
Carbon 1d/2d Nanoelectronics : Integration And Device Applications, Zhaoying Hu
Carbon 1d/2d Nanoelectronics : Integration And Device Applications, Zhaoying Hu
Legacy Theses & Dissertations (2009 - 2024)
Graphene is a one-atom thick planar monolayer of sp2-bonded carbon atoms organized in a hexagonal crystal lattice. A single walled carbon nanotube (CNT) can be thought of as a graphene sheet rolled up into a seamless hollow cylinder with extremely high length-to-diameter ratio. Their ultra-thin body, large surface area, and exceptional electronic, optical and mechanical properties make these low-dimensional carbon materials ideal candidates for electronic applications. However, adopting low-dimensional carbon materials into semiconductor industry faces significant material and integration challenges. There is an urgent need for research at fundamental and applicative levels to find a roadmap for carbon nanomaterial to …
3d Integration With Coaxial Through Silicon Vias, Stephen Adamshick
3d Integration With Coaxial Through Silicon Vias, Stephen Adamshick
Legacy Theses & Dissertations (2009 - 2024)
3D integration using through-silicon-vias (TSVs) is gaining considerable attention due to its superior packaging efficiency resulting in higher functionality, improved performance and a reduction in power consumption. In order to implement 3D chip designs with TSV technology, robust TSV electrical models are required. Specifically, due to the increase of signal speeds into the gigahertz (GHz) spectrum, a high frequency electrical characterization best describes TSV behavior.
Study Of Millisecond Laser Annealing On Ion Implanted Soi And Application To Scaled Finfet Technology, Tyler J. Michalak
Study Of Millisecond Laser Annealing On Ion Implanted Soi And Application To Scaled Finfet Technology, Tyler J. Michalak
Legacy Theses & Dissertations (2009 - 2024)
The fabrication of metal-oxide-semiconductor field effect transistors (MOSFET) requires the engineering of low resistance, low leakage, and extremely precise p-n junctions. The introduction of finFET technology has introduced new challenges for traditional ion implantation and annealing techniques in junction design as the fin widths continue to decrease for improved short channel control. This work investigates the use of millisecond scanning laser annealing in the formation of n-type source/drain junctions in next generation MOSFET.
High Frequency Signal Transmission In Through Silicon Via Based 3d Integrated Circuit, Min Xu
High Frequency Signal Transmission In Through Silicon Via Based 3d Integrated Circuit, Min Xu
Legacy Theses & Dissertations (2009 - 2024)
Through silicon vias (TSVs) enable 3-dimensional (3D) integrated circuits (ICs), which have the potential to reduce the power consumption, interconnect length and overall communication latency in modern nanoelectronics systems. High-speed signal transmission channels through stacked silicon substrates are critical for 3D heterogeneous integration. This work presents systematic analyses of fabricated 3D IC test structures. This includes test structure design, fabrication, experimental characterization, equivalent circuit modeling and full wave simulations for high-speed signal transmission of the TSV based 3D IC channels.