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Electrical and Computer Engineering

University of Kentucky

Theses/Dissertations

Nanowires

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Full-Text Articles in Engineering

Copper Indium Diselenide Nanowire Arrays In Alumina Membranes Deposited On Molybdenum And Other Back Contact Substrates, Bhavananda R. Nadimpally Jan 2013

Copper Indium Diselenide Nanowire Arrays In Alumina Membranes Deposited On Molybdenum And Other Back Contact Substrates, Bhavananda R. Nadimpally

Theses and Dissertations--Electrical and Computer Engineering

Heterojunctions of CuInSe2 (CIS) nanowires with cadmium sulfide (CdS) were fabricated demonstrating for the first time, vertically aligned nanowires of CIS in the conventional Mo/CIS/CdS stack. These devices were studied for their material and electrical characteristics to provide a better understanding of the transport phenomena governing the operation of heterojunctions involving CIS nanowires. Removal of several key bottlenecks was crucial in achieving this. For example, it was found that to fabricate alumina membranes on molybdenum substrates, a thin interlayer of tungsten had to be inserted. A qualitative model was proposed to explain the difficulty in fabricating anodized aluminum oxide …


Synthesis And Characterization Of P-Type Copper Indium Diselenide (Cis) Nanowires Embedded In Porous Alumina Templates, Sri Harsha Moturu Jan 2011

Synthesis And Characterization Of P-Type Copper Indium Diselenide (Cis) Nanowires Embedded In Porous Alumina Templates, Sri Harsha Moturu

University of Kentucky Master's Theses

This work focuses on a simple template assisted approach for fabricating I-III-VI semiconductor nanowire arrays. Vertically aligned nanowires of p-CIS of controllable diameter and thickness are electrodeposited, from an acidic electrolyte solution, inside porous aluminum templates using a three electrode set up with saturated calomel electrode as the reference. AAO template over ITO-glass was used as starting template for the device fabrication. The deposited CIS is annealed at different temperatures in a reducing environment (95% Ar+ 5% H2) for 30 minutes. X-ray diffraction of the nanowires showed nanocrystalline cubic phase structures with a strong orientation in the <112> direction. …


Synthesis And Characterization Of Schottky Diodes On N-Type Cdte Nanowires Embedded In Porous Alumina Templates, Srikanth Yanamanagandla Jan 2008

Synthesis And Characterization Of Schottky Diodes On N-Type Cdte Nanowires Embedded In Porous Alumina Templates, Srikanth Yanamanagandla

University of Kentucky Master's Theses

This work focuses on the growth of vertically aligned CdTe nanowire arrays of controllable diameter and length using cathodic electro deposition in anodized alumina templates. This step was followed by annealing at 250° C in a reducing environment (95% Ar + 5% H2). AAO template over ITO-glass was used as starting template for the device fabrication. The deposited nanowires showed nanocrystalline cubic phase structures with a strong preference in [111] direction. First gold (Au) was deposited into AAO using cathodic electro deposition. This was followed by CdTe deposition into the pore. Gold was deposited first as it aids the growth …