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An Efficient Reliability Simulation Tool For Lifetime-Aware Analog Circuit Synthesis, Engi̇n Afacan

Turkish Journal of Electrical Engineering and Computer Sciences

Time-dependent degradation (aging) has become more severe in modern CMOS technologies. Therefore, it is highly critical to capture the variation effects and design reliable circuits against aging. Simulation of time-dependent variations is quite complicated since the degradation is a function of time, where the step count of simulation directly affects the accuracy and the efficiency of the analysis. Commercial simulator tools use a constant step count during reliability simulations, in which choosing a large step count degrades the efficiency whereas keeping it small may result in accuracy problems. To overcome this bottleneck, a couple of different approaches have been proposed …