Physical Sciences and Mathematics Commons^™

A Sixteen-Valued Algorithm For Test Generation In Combinational Circuits, Akhtar Uz Zaman, M. Ali, Carlos R.P. Hartmann

Electrical Engineering and Computer Science - Technical Reports

A 16-valued logic system for testing combinational circuits is presented. This logic system has been used to develop SIMPLE, an efficient test generation algorithm for single stuck-at faults. The proposed scheme for testing stuck-at faults is based on imposing all the constraints that must be satisfied in order to sensitize a path from a fault site to a primary output. Consequently all deterministic implications are fully considered prior to the enumeration process. The resulting ability to identify inconsistencies prior to enumeration improves the possibility of quicker identification of redundant faults. In order to prune the search space we have introduced …