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Electrical Engineering and Computer Science - Technical Reports
Artificial intelligence; computer control; constraint theory; delays; monitoring; safety; system integrity
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Explicit Clock Temporal Logic In Timing Constraints For Real-Time Systems, S. Ramanna, J. F. Peters Iii
Explicit Clock Temporal Logic In Timing Constraints For Real-Time Systems, S. Ramanna, J. F. Peters Iii
Electrical Engineering and Computer Science - Technical Reports
A form of explicit clock temporal logic (called TLrt) useful in specifying timing constraints on controller actions, a real-time database (rtdb) items, and constraints in a real-time constraint base (rtcb), is presented. Timing as well as other forms of constraints are stored in the rtcb. A knowledge-based approach to ensure the integrity of information in an rtdb is given. The rtcb is realized as a logic program called Constrainer, which is a historyless integrity checker for a real-time database. The consistency and integrity issues for an rtcb and rtdb are investigated. The formal bases for a temporally complete rtdb and …