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Full-Text Articles in Physical Sciences and Mathematics
A Statistical Theory Of Digital Circuit Testability, Sharad C. Seth, Vishwani D. Agrawal, Hassan Farhat
A Statistical Theory Of Digital Circuit Testability, Sharad C. Seth, Vishwani D. Agrawal, Hassan Farhat
School of Computing: Faculty Publications
When test vectors are applied to a circuit, the fault coverage increases. The rate of increase, however, could be circuit dependent. A relation between the average fault coverage and circuit testability is developed in this paper. The statistical formulation allows computation of coverage for deterministic and random vectors. We discuss the following applications of this analysis: determination of circuit testability from fault simulation, coverage prediction from testability analysis, prediction of test length, and test generation by fault sampling.
High-Level Microprogramming: An Optimising C Compiler For A Processing Element Of A Cad Accelerator, Paul Kenyon, Prathima Agrawal, Sharad C. Seth
High-Level Microprogramming: An Optimising C Compiler For A Processing Element Of A Cad Accelerator, Paul Kenyon, Prathima Agrawal, Sharad C. Seth
School of Computing: Faculty Publications
The development of a high-level language compiler for a micro-programmable processing element (PE) in the MARS multicomputer is described. MARS, an MIMD message passing machine, was designed to speed up VLSI CAD and similar other non-numerical applications. The need for sup port of a high-level language at the PE level of a multicomputer is considered, and the choice of C as an appropriate programming language is justified. Special features found in VLSI processors are examined along with compiler support for them.
Conventional re-targetable compiler techniques are shown to be inadequate for the highly concurrent micro-programmable PE. These techniques must be …
An Experimental Study On Reject Ratio Prediction For Vlsl Circuits: Kokomo Revisited, Dharam Vir Das, Sharad C. Seth, Paul T. Wagner, John Anderson, Vishwani Agrawal
An Experimental Study On Reject Ratio Prediction For Vlsl Circuits: Kokomo Revisited, Dharam Vir Das, Sharad C. Seth, Paul T. Wagner, John Anderson, Vishwani Agrawal
School of Computing: Faculty Publications
Assuring product quality is becoming increasingly more important for the semiconductor chip manufacturers. The reject ratio (defect level) provides a simple and accurate measure of a product's quality. However, measuring the reject ratio of tested chips is often not feasible or accurate. Statistical techniques for reject ratio prediction provide a possible way out of this dilemma. In this paper, we report on an experiment to verify the accuracy of reject ratio predictions by the available approaches. The data collection effort includes instrumenting the wafer probe test to obtain chip failures as a function of applied vectors and running a fault …