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Models For Reducing Power Consumption In Cpld And Fpga Devices, Marsida Ibro, Luan Karçanaj Oct 2016

Models For Reducing Power Consumption In Cpld And Fpga Devices, Marsida Ibro, Luan Karçanaj

UBT International Conference

Usage of programmable logic devices PLD has increased in the latest years because of the ability to quickly implement complex types of electronic systems while reducing cost and time of synthesis. This technology enables dynamic reconfiguration of different applications according to specific requirements. Also, power consumption and its loss is becoming an increasingly important requirement in the design of systems for portable applications fed by batteries.

Other factors to be taken into account in the consumption of power are elements that are used for manufacturing, packaging, and cooling systems. Power consumption must be taken into consideration especially for wireless applications …