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Full-Text Articles in Physical Sciences and Mathematics
Design Of A Low-Power Cmos Operational Amplifier With Common-Mode Feedback For Pipeline Analog-To-Digital Converter Applications, Sohiful Anuar Zainol Murad, Izatul Syafina Ishak, Mohd Fairus Ahmad, Shaiful Nizam Mohyar
Design Of A Low-Power Cmos Operational Amplifier With Common-Mode Feedback For Pipeline Analog-To-Digital Converter Applications, Sohiful Anuar Zainol Murad, Izatul Syafina Ishak, Mohd Fairus Ahmad, Shaiful Nizam Mohyar
Turkish Journal of Electrical Engineering and Computer Sciences
This paper proposes a design of a low-power operational amplifier (op-amp) for pipeline analog-to-digital converter (ADC) applications using a 0.13-$\mu $m CMOS process. The folded-cascode topology with NMOS input types is employed for the op-amp design due to a larger output gain compared to PMOS input types. Furthermore, the op-amp is designed with a double detection structure of a common-mode feedback circuit to provide stable feedback voltage. The simulation results show that the proposed op-amp achieved a gain of 64.5 dB and a unity gain bandwidth of 695.1 MHz with a low power consumption of 0.14 mW. In addition, by …
Low Power 3rd Order Feedforward Sigma Delta Adc Design, Feyyaz Meli̇h Akçakaya, Günhan Dündar
Low Power 3rd Order Feedforward Sigma Delta Adc Design, Feyyaz Meli̇h Akçakaya, Günhan Dündar
Turkish Journal of Electrical Engineering and Computer Sciences
In this work, a 3-bit feedforward 3rd order sigma delta analog-to-digital converter (ADC) is presented. In this proposed architecture, feedforward paths and multibit design help the integrator output swings to become smaller, which renders the exploitation of a telescopic cascode opamp in the integrators possible. Moreover, a double sampling method is used to relax the opamp specifications. The proposed sigma delta ADC consumes 28.2 $\mu $W and has 81.3 dB SNDR according to postlayout simulations.