Physical Sciences and Mathematics Commons^™

Rethinking Timestamping: Time Stamp Counter Design For Virtualized Environment, Alexander Tabatadze

UNLV Theses, Dissertations, Professional Papers, and Capstones

Almost every processor supports Time Stamp Counter (TSC), which is a hardware register that increments its value every clock cycle. Due to its high resolution and accessibility, TSC is now widely used for a variety tasks that need time measurements such as wall clock, code benchmarking, or metering hardware usage for account billing.

However, if not carefully configured and interpreted, TSC-based time measurements can yield inaccurate readings. For instance, modern CPU may dynamically change its frequency or enter into low-power states. Also, time spent on scheduling events, system calls, page faults, etc. should be correctly accounted for. Even more complications …