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Full-Text Articles in Physical Sciences and Mathematics
An Fpga-Based Hardware Accelerator For The Digital Image Correlation Engine, Keaten Stokke
An Fpga-Based Hardware Accelerator For The Digital Image Correlation Engine, Keaten Stokke
Graduate Theses and Dissertations
The work presented in this thesis was aimed at the development of a hardware accelerator for the Digital Image Correlation engine (DICe) and compare two methods of data access, USB and Ethernet. The original DICe software package was created by Sandia National Laboratories and is written in C++. The software runs on any typical workstation PC and performs image correlation on available frame data produced by a camera. When DICe is introduced to a high volume of frames, the correlation time is on the order of days. The time to process and analyze data with DICe becomes a concern when …
A Proposed Approach To Hybrid Software-Hardware Application Design For Enhanced Application Performance, Alex Shipman
A Proposed Approach To Hybrid Software-Hardware Application Design For Enhanced Application Performance, Alex Shipman
Graduate Theses and Dissertations
One important aspect of many commercial computer systems is their performance; therefore, system designers seek to improve the performance next-generation systems with respect to previous generations. This could mean improved computational performance, reduced power consumption leading to better battery life in mobile devices, smaller form factors, or improvements in many areas. In terms of increased system speed and computation performance, processor manufacturers have been able to increase the clock frequency of processors up to a point, but now it is more common to seek performance gains through increased parallelism (such as a processor having more processor cores on a single …
A Hybrid Partially Reconfigurable Overlay Supporting Just-In-Time Assembly Of Custom Accelerators On Fpgas, Zeyad Tariq Aklah
A Hybrid Partially Reconfigurable Overlay Supporting Just-In-Time Assembly Of Custom Accelerators On Fpgas, Zeyad Tariq Aklah
Graduate Theses and Dissertations
The state of the art in design and development flows for FPGAs are not sufficiently mature to allow programmers to implement their applications through traditional software development flows. The stipulation of synthesis as well as the requirement of background knowledge on the FPGAs' low-level physical hardware structure are major challenges that prevent programmers from using FPGAs. The reconfigurable computing community is seeking solutions to raise the level of design abstraction at which programmers must operate, and move the synthesis process out of the programmers' path through the use of overlays. A recent approach, Just-In-Time Assembly (JITA), was proposed that enables …
Extending The Hybridthread Smp Model For Distributed Memory Systems, Eugene Anthony Cartwright Iii
Extending The Hybridthread Smp Model For Distributed Memory Systems, Eugene Anthony Cartwright Iii
Graduate Theses and Dissertations
Memory Hierarchy is of growing importance in system design today. As Moore's Law allows system designers to include more processors within their designs, data locality becomes a priority. Traditional multiprocessor systems on chip (MPSoC) experience difficulty scaling as the quantity of processors increases. This challenge is common behavior of memory accesses in a shared memory environment and causes a decrease in memory bandwidth as processor numbers increase. In order to provide the necessary levels of scalability, the computer architecture community has sought to decentralize memory accesses by distributing memory throughout the system. Distributed memory offers greater bandwidth due to decoupled …