Engineering Commons^™

Algorithm For Computational Imaging On A Real-Time Hardware, Manish Bhattarai

Electrical and Computer Engineering ETDs

DRAMATIC advances in the field of computational and medical imaging over the past decades have enabled many critical applications such as night vision, medical diagnosis, quality control, and remote sensing. The increasing demand for image quality and its fidelity requires an increase in pixel count and a sophisticated post-processing mechanism to efficiently store, transmit, and analyze this massive data. There is an inherent trade-off between the generation of big data by such imaging systems and efficiency in extraction of useful information within real-time constraints, limiting the efficacy of such sensors in real-time decision-making systems. The traditional imaging system gets burdened …

A Low Power High Speed Mobile Memory I/O Interface Using Reconfigurable Multi-Band Multi-Modulation Signaling, Yue Yu

Electrical Engineering Theses and Dissertations

This research mainly focuses on the design of a novel memory I/O interface with high bandwidth and high energy-efficient for mobile computing systems in order to dramatically enhance the circuit and system bandwidth and power efficiency. The proposed memory I/O interface, exploiting multi-modulation and multi-band signaling, is capable of supporting simultaneous bidirectional data transition of 4 separate data streams across a single-ended off-chip transmission line to achieve both high speed data rate and low power consumption. This multi-band multi-modulation interface (MMI) consists of multiple RF-band transceivers which utilize ASK modulation, and baseband transceivers which utilize 4-PAM modulation to increase the …

Asynchronous 3d (Async3d): Design Methodology And Analysis Of 3d Asynchronous Circuits, Francis Corpuz Sabado

Graduate Theses and Dissertations

This dissertation focuses on the application of 3D integrated circuit (IC) technology on asynchronous logic paradigms, mainly NULL Convention Logic (NCL) and Multi-Threshold NCL (MTNCL). It presents the Async3D tool flow and library for NCL and MTNCL 3D ICs. It also analyzes NCL and MTNCL circuits in 3D IC. Several FIR filter designs were implement in NCL, MTNCL, and synchronous architecture to compare synchronous and asynchronous circuits in 2D and 3D ICs. The designs were normalized based on performance and several metrics were measured for comparison. Area, interconnect length, power consumption, and power density were compared among NCL, MTNCL, and …

Design And Evaluation Of A Sub-1-Volt Read Flash Memory In A Standard 130 Nanometer Cmos Process, David Andrew Basford

Masters Theses

Nonvolatile memory design is a discipline that employs digital and analog circuit design techniques and requires knowledge of semiconductor physics and quantum mechanics. Methods for programming and erasing memory are discussed here, and simulation models are provided for Impact Hot Electron Injection (IHEI), Fowler-Nordheim (FN) tunneling, and direct tunneling. Extensive testing of analog memory cells was used to derive a set of equations that describe the oating-gate characteristics. Measurements of charge retention also revealed several leakage mechanisms, and methods for mitigating leakage are presented.

Fabrication of ash memory in a standard CMOS process presents significant design challenges. The absence of …

An Analog Cmos Particle Filter, Trevor Watson

Masters Theses

Particle filters are used in a variety of image processing and machine learning applications. Their main use in these applications is to gather information about a system of objects, by using partial or noisy observations collected from sensors. These observations are used to associate points of interest in the observations with objects and maintain this association through a series of observations.

In this paper I will investigate the performance of a particle filter implemented in 130nm analog CMOS hardware. The design goal of the particle filter is low-microwatt power consumption. Using analog hardware, rather than digital ASICs or CPUs I …

Design And Simulation Of An 8-Bit Successive Approximation Register Charge-Redistribution Analog-To-Digital Converter, Sumit K. Verma

Electrical Engineering Theses

The thesis initially investigates the history of the monolithic ADCs. The next chapter explores the different types of ADCs available in the market today. Next, the operation of a 4-bit SAR ADC has been studied. Based on this analysis, an 8-bit charge-redistribution SAR ADC has been designed and simulated with Multisim (National Instruments, Austin, TX). The design is divided into different blocks which are individually implemented and tested. Level-1 SPICE MOSFET models representative of 5μm devices were used wherever individual MOSFETs were used in the design. Finally, the power dissipation during the conversion period was also estimated. The supply voltage …

Formal Analysis Of Arithmetic Circuits Using Computer Algebra - Verification, Abstraction And Reverse Engineering, Cunxi Yu

Doctoral Dissertations

Despite a considerable progress in verification and abstraction of random and control logic, advances in formal verification of arithmetic designs have been lagging. This can be attributed mostly to the difficulty in an efficient modeling of arithmetic circuits and datapaths without resorting to computationally expensive Boolean methods, such as Binary Decision Diagrams (BDDs) and Boolean Satisfiability (SAT), that require “bit blasting”, i.e., flattening the design to a bit-level netlist. Approaches that rely on computer algebra and Satisfiability Modulo Theories (SMT) methods are either too abstract to handle the bit-level nature of arithmetic designs or require solving computationally expensive decision or …

Energy Efficient Loop Unrolling For Low-Cost Fpgas, Naveen Kumar Dumpala

Masters Theses

Many embedded applications implement block ciphers and sorting and searching algorithms which use multiple loop iterations for computation. These applications often demand low power operation. The power consumption of designs varies with the implementation choices made by designers. The sequential implementation of loop operations consumes minimal area, but latency and clock power are high. Alternatively, loop unrolling causes high glitch power. In this work, we propose a low area overhead approach for unrolling loop iterations that exhibits reduced glitch power. A latch based glitch filter is introduced that reduces the propagation of glitches from one iteration to next. We explore …

Skynet: Memristor-Based 3d Ic For Artificial Neural Networks, Sachin Bhat

Masters Theses

Hardware implementations of artificial neural networks (ANNs) have become feasible due to the advent of persistent 2-terminal devices such as memristor, phase change memory, MTJs, etc. Hybrid memristor crossbar/CMOS systems have been studied extensively and demonstrated experimentally. In these circuits, memristors located at each cross point in a crossbar are, however, stacked on top of CMOS circuits using back end of line processing (BOEL), limiting scaling. Each neuron’s functionality is spread across layers of CMOS and memristor crossbar and thus cannot support the required connectivity to implement large-scale multi-layered ANNs.

This work proposes a new fine-grained 3D integrated circuit technology …

Oracle Guided Incremental Sat Solving To Reverse Engineer Camouflaged Circuits, Xiangyu Zhang

Masters Theses

This study comprises two tasks. The first is to implement gate-level circuit camouflage techniques. The second is to implement the Oracle-guided incremental de-camouflage algorithm and apply it to the camouflaged designs.

The circuit camouflage algorithms are implemented in Python, and the Oracle- guided incremental de-camouflage algorithm is implemented in C++. During this study, I evaluate the Oracle-guided de-camouflage tool (Solver, in short) performance by de-obfuscating the ISCAS-85 combinational benchmarks, which are camouflaged by the camouflage algorithms. The results show that Solver is able to efficiently de-obfuscate the ISCAS-85 benchmarks regardless of camouflaging style, and is able to do so 10.5x …

Laser As A Tool To Study Radiation Effects In Cmos, Bahar Ajdari

Dissertations and Theses

Energetic particles from cosmic ray or terrestrial sources can strike sensitive areas of CMOS devices and cause soft errors. Understanding the effects of such interactions is crucial as the device technology advances, and chip reliability has become more important than ever. Particle accelerator testing has been the standard method to characterize the sensitivity of chips to single event upsets (SEUs). However, because of their costs and availability limitations, other techniques have been explored. Pulsed laser has been a successful tool for characterization of SEU behavior, but to this day, laser has not been recognized as a comparable method to beam …

Synthesis Of Linear Reversible Circuits And Exor-And-Based Circuits For Incompletely Specified Multi-Output Functions, Ben Schaeffer

Dissertations and Theses

At this time the synthesis of reversible circuits for quantum computing is an active area of research. In the most restrictive quantum computing models there are no ancilla lines and the quantum cost, or latency, of performing a reversible form of the AND gate, or Toffoli gate, increases exponentially with the number of input variables. In contrast, the quantum cost of performing any combination of reversible EXOR gates, or CNOT gates, on n input variables requires at most O(n^₂/log₂n) gates. It was under these conditions that EXOR-AND-EXOR, or EPOE, synthesis was developed.

In this …

Early Layout Design Exploration In Tsv-Based 3d Integrated Circuits, Mohammad Abrar Ahmed

Dissertations and Theses

Through silicon via (TSV) based 3D integrated circuits have inspired a novel design paradigm which explores the vertical dimension, in order to alleviate the performance and power limitations associated with long interconnects in 2D circuits. TSVs enable vertical interconnects across stacked and thinned dies in 3D-IC designs, resulting in reduced wirelength, footprint, faster speed, improved bandwidth, and lesser routing congestion. However, the usage of TSVs itself gives rise to many critical design challenges towards the minimization of chip delay and power consumption. Therefore, realization of the benefits of 3D ICs necessitates an early and realistic prediction of circuit performance during …

Logic Tiles, Andrew Wheeler, Tristan Lennertz

Computer Engineering

This project was originally conceived by Professor Andrew Danowitz as he considered the restructuring of the introductory digital design course at Cal Poly. As it stands now, students apply their knowledge of boolean algebra and combinatorial logic through the programming of a Field Programmable Gate Array (FPGA) using a Hardware Descriptive Language (HDL). While this is the industry standard for designing large, complex digital circuits, and is an fundamental skill to learn, there is a lack of actual circuit building in the process that can cause a disconnect from theory to application for students who have little-to-no experience with digital …

Smart Safeguard, Stephen J. Marrone

Electrical Engineering

Smart Safeguard is designed to provide people with an affordable device that will notify the authorities when the buyer gets in a car crash. The device will operate off the 12V car power that is present in every car and use an accelerometer to detect if an accident has occurred. If an accident is detected the device will proceed to light up and make a noise until the passenger pushes a button on the device. If the passenger doesn’t push the button within 15 seconds the device, which is wirelessly connected to the passenger’s phone, will initiate a text to …

Remote Cable Gantry, Allen L. Bailey

Electrical Engineering

The Remote Cable Gantry is a robotic system that was initially intended to aid in the art of aerial videography. It was designed to enable novice and expert users alike to capture both video footage and audio from perspectives unachievable by current methods. This system uses a series of cables to control the position of a camera gimbal in a defined 3D space and, as a self-contained unit, is portable and easy to use. The Remote Cable Gantry offers a quiet, intuitive, and safe alternative to existing technology, which has been limiting the market and potential of aerial photography and …

Music Synthesizer Senior Project: Individual Report, Bryan Bellin

Electrical Engineering

No abstract provided.

Music Synthesizer Senior Project: Danalog, Vikrant A. Marathe

Electrical Engineering

The Danalog is a 25 key portable digital music synthesizer that uses multiple synthesis methods and effects to generate sounds. Sound varieties included three synthesis methods including FM, subtractive, and sample-based, with up to eight adjustable parameters, at least four effects, including reverb, chorus, and flange, with five adjustable parameters, and at least two note polyphony, and a five band equalizer. The user would be able to adjust these effects using digital encoders and potentiometers and view the settings on two LCD screens. The finals project was unable to meet the original design requirements. The FM synthesis method was primarily …

Danalog: Digital Music Synthesizer, Evan R. Lew

Electrical Engineering

The Danalog is a 25 key portable digital music synthesizer that uses multiple synthesis methods and effects to generate sounds. Sound varieties included three synthesis methods including FM, subtractive, and sample-based, with up to eight adjustable parameters, at least four effects, including reverb, chorus, and flange, with five adjustable parameters, and at least two note polyphony, and a five band equalizer. The user would be able to adjust these effects using digital encoders and potentiometers and view the settings on two LCD screens.

The finals project was unable to meet the original design requirements. The FM synthesis method was primarily …

Wireless Audio Bridge, Daniel L. Hodges

Electrical Engineering

Bluetooth, a wireless technology standard used to exchange data using radio transmissions, has made a significant impact on the audio technology industry, specifically the way people listen to music. This technology enables a wireless listening experience, eliminating the need for wires or cables between audio devices as previously required. Audio can transmit from a cellphone or laptop (an output device) to a pair of headphones or speakers (an input device) without any physical connection. Compared to alternative wireless listening solutions (i.e. FM transmitter, radio broadcast), Bluetooth offers greater reliability, audio fidelity, portability, and ease of use. To obtain this functionality, …

Investigating Read/Write Aggregation To Exploit Power Reduction Opportunities Using Dual Supply Voltages, Gu Yunfei

McKelvey School of Engineering Theses & Dissertations

Power consumption plays an important role in computer system design today. On-chip memory structures such as multi-level cache make up a significant proportion of total power consumption of CPU or Application-Specific Integrated Circuit (AISC) chip, especially for memory-intensive application, such as floating-point computation and machine learning algorithm. Therefore, there is a clear motivation to reduce power consumption of these memory structures that are mostly consisting of Static Random-Access Memory (SRAM) blocks. In this defense, I will present the framework of a novel dual-supply-voltage scheme that uses separate voltage levels for memory read and write operations. By quantitatively analyzing the cache …

An Exact Analysis For Four-Order Acousto-Optic Bragg Diffraction Which Incorporates Both Incident Light Angle And Sound Frequency Dependencies, Adeyinka Sunday Ademola

Electrical Engineering Theses

This thesis extends the prior work which produced an exact solution to the four-order acousto-optic (AO) Bragg cell with assumed fixed center frequency and with exact Bragg angle incident light. The extension predicts the model that incorporates the dependencies of both the input angle of light and the sound frequency. Specifically, a generalized 4^th order linear differential equation (DE), is developed from a simultaneous analysis of four coupled AO system of DEs. Through standard methods, the characteristic roots, which requires solving a quartic equation, is produced. Subsequently, a derived system of homogeneous solutions, which absorbs the roots obtained using …

Implementation Of Range Autofocus For Sar Radar Imaging, Nicholas J. Testin, Philip Davis

KSU Journey Honors College Capstones and Theses

The range calculation for an FMCW radar depends on accurate linear modulation. In some circumstances, linear modulation may not be available and must be corrected for. This paper describes an autofocus technique used to correct for phase error due to non-linearities in the components of a FMCW radar. Also described here is the algorithm used in calculating the phase error and application of the phase correction with triangle modulation. Known errors were calculated at certain distances and applied to correcting the phase of data taken at similar distances. The results given were generated using a SAR working outside linear ranges.

Hexarray: A Novel Self-Reconfigurable Hardware System, Fady Hussein

Boise State University Theses and Dissertations

Evolvable hardware (EHW) is a powerful autonomous system for adapting and finding solutions within a changing environment. EHW consists of two main components: a reconfigurable hardware core and an evolutionary algorithm. The majority of prior research focuses on improving either the reconfigurable hardware or the evolutionary algorithm in place, but not both. Thus, current implementations suffer from being application oriented and having slow reconfiguration times, low efficiencies, and less routing flexibility. In this work, a novel evolvable hardware platform is proposed that combines a novel reconfigurable hardware core and a novel evolutionary algorithm.

The proposed reconfigurable hardware core is a …

Project Pradio, Trigg T. La Tour

Computer Science and Computer Engineering Undergraduate Honors Theses

This paper examines the design and manufacturing of a device that allows two or more users to share a wireless audio stream. Effectively, this allows a group of people to listen to the same audio in a synchronized manner. The product was unable to be completed in the allotted time. Regardless, significant progress was made and valuable insight into the circuit board design process was gained.

Design Of A Folded Cascode Operational Amplifier In A 1.2 Micron Silicon-Carbide Cmos Process, Kyle Addington

Electrical Engineering Undergraduate Honors Theses

This thesis covers the design of a Folded Cascode CMOS Operational Amplifier (Op-Amp) in Raytheon’s 1.2-micron Silicon Carbide (SiC) process. The use of silicon-carbide as a material for integrated circuits (ICs) is gaining popularity due to its ability to function at high temperatures outside the range of typical silicon ICs. The goal of this design was to create an operational amplifier suitable for use in a high temperature analog-to-digital converter application. The amplifier has been designed to have a DC gain of 50dB, a phase margin of 50 degrees, and a bandwidth of 2 MHz. The circuit’s application includes input …

Short-Circuit Protection For Low-Voltage Dc Distribution Systems Based On Solid-State Circuit Breakers, Sharthak Munasib

Graduate Theses and Dissertations

Proper short-circuit protection in dc distribution systems has provided an austere challenge to researchers as the development of commercially-viable equipment providing fast operation, coordination and reliability still continues. The objective of this thesis is to analyze issues associated with short-circuit protection of low-voltage dc (LVDC) distribution systems and propose a short-circuit protection methodology based on solid-state circuit breakers (SSCBs) that provides fault-current limiting (FCL). Simulation results for a simplified notional 1-kVdc distribution system, performed in MATLAB/SIMULINKTM, would be presented to illustrate that SSCB solutions based on reverse-blocking integrated gate-commutated thyristors (RB-IGCT) are feasible for low-voltage dc distribution systems but requires …

Design And Test Of A Gate Driver With Variable Drive And Self-Test Capability Implemented In A Silicon Carbide Cmos Process, Matthew Barlow

Graduate Theses and Dissertations

Discrete silicon carbide (SiC) power devices have long demonstrated abilities that outpace those of standard silicon (Si) parts. The improved physical characteristics allow for faster switching, lower on-resistance, and temperature performance. The capabilities unleashed by these devices allow for higher efficiency switch-mode converters as well as the advance of power electronics into new high-temperature regimes previously unimaginable with silicon devices. While SiC power devices have reached a relative level of maturity, recent work has pushed the temperature boundaries of control electronics further with silicon carbide integrated circuits.

The primary requirement to ensure rapid switching of power MOSFETs was a gate …

A Sub-Threshold Low-Power Integrated Bandpass Filter For Highly-Integrated Spectrum Analyzers, Benjamin David Roehrs

Masters Theses

Low-power analog filter banks provide frequency analysis with minimal space requirements, making them viable solutions for integrated remote audio- and vibration-sensing applications. In order to achieve a balance between the length of deployable service and system performance, a critical requirement of such remote sensor networks is low-power consumption, due to the constraints imposed by on-board battery cells.

In this work, the design and implementation of a sub-threshold complementary metal-oxide semiconductor (CMOS) integrated low-power tunable analog filter channel for Oak Ridge National Laboratory is presented. Project specifications required a tunable, high-order, monolithic bandpass filter channel with small chip area and low …

Silicon Germanium Bicmos Comparator Designed For Use In An Extreme Environment Analog To Digital Converter, Benjamin Riley Sissons

Graduate Theses and Dissertations

This thesis demonstrates the process of creating a radiation hardened and extreme temperature operating comparator from start to finish in the 90 nm SiGe 9HP process node. This includes the entire design flow from examining comparator topologies, to designing the initial comparator circuits, to simulating the comparator over a temperature range of -196°C to 125°C, and finally the testing of the fabricated circuit. To verify the circuit would work at low temperatures, several new device models were created that could be used for simulations at -196°C. In addition to its properties as a standalone comparator, the circuit was also used …