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Full-Text Articles in Engineering
Root Cause Analysis And Classification Of Single Point Failures In Designs Applying Triple Modular Redundancy In Sram Fpgas, James D. Swift
Root Cause Analysis And Classification Of Single Point Failures In Designs Applying Triple Modular Redundancy In Sram Fpgas, James D. Swift
Theses and Dissertations
Radiation effects encountered in space or aviation environments can affect the configuration bits in Field Programmable Gate Arrays (FPGA) causing errors in FPGA output. One method of increasing FPGA reliability in radiation environments includes adding redundant logic to mask errors and allow time for repair. Despite the redundancy added with triple modular redundancy (TMR) and configuration scrubbing there exist some configuration bits that individually affect multiple TMR domains causing errors in FPGA output. A new tool called DeBit is introduced that identifies hardware resources associated with a single bit failure. This tool identifies a novel failure mode involving global routing …
Compiler-Based Tools To Aid In Data Transfer Optimization And On-Chip Debug Of Heterogeneous Compute Systems, Matthew B. Ashcraft
Compiler-Based Tools To Aid In Data Transfer Optimization And On-Chip Debug Of Heterogeneous Compute Systems, Matthew B. Ashcraft
Theses and Dissertations
First, we present techniques to efficiently schedule data transfers through compiler analyses. Compared to transferring data immediately before and after the kernel executes, our scheduling results in orders of magnitude improvements in execution time, number of data transfers, and number of bytes transferred. Second, we demonstrate techniques to provide on-chip debugging for heterogeneous systems through recording execution on the software in addition to debugging circuitry in the hardware, and provide a temporal correlation between the hardware and software traces through synchronization. This allows us to follow debug data between the hardware and software trace buffers. Due to the added cost …
Evaluating And Improving The Seu Reliability Of Artificial Neural Networks Implemented In Sram-Based Fpgas With Tmr, Brittany Michelle Wilson
Evaluating And Improving The Seu Reliability Of Artificial Neural Networks Implemented In Sram-Based Fpgas With Tmr, Brittany Michelle Wilson
Theses and Dissertations
Artificial neural networks (ANNs) are used in many types of computing applications. Traditionally, ANNs have been implemented in software, executing on CPUs and even GPUs, which capitalize on the parallelizable nature of ANNs. More recently, FPGAs have become a target platform for ANN implementations due to their relatively low cost, low power, and flexibility. Some safety-critical applications could benefit from ANNs, but these applications require a certain level of reliability. SRAM-based FPGAs are sensitive to single-event upsets (SEUs), which can lead to faults and errors in execution. However there are techniques that can mask such SEUs and thereby improve the …
Dynamic Reconfigurable Real-Time Video Processing Pipelines On Sram-Based Fpgas, Andrew Elbert Wilson
Dynamic Reconfigurable Real-Time Video Processing Pipelines On Sram-Based Fpgas, Andrew Elbert Wilson
Theses and Dissertations
For applications such as live video processing, there is a high demand for high performance and low latency solutions. The configurable logic in FPGAs allows for custom hardware to be tailored to a specific video application. These FPGA designs require technical expertise and lengthy implementation times by vendor tools for each unique solution. This thesis presents a dynamically configurable topology as an FPGA overlay to deploy custom hardware processing pipelines during run-time by utilizing dynamic partial reconfiguration. Within the FPGA overlay, a configurable topology with a routable switch allows video streams to be copied and mixed to create complex data …
Distributed Memory Based Fpga Debug, Robert Benjamin Hale
Distributed Memory Based Fpga Debug, Robert Benjamin Hale
Theses and Dissertations
Field-programmable gate arrays (FPGAs) are powerful integrated circuits for low-overhead custom computing needs and design prototyping. Due to the hardware nature of programming an FPGA, finding bugs in a design can be a very challenging process. Signals need to be physically probed and data recorded in real time. This is often done by dedicating some resources on the FPGA itself towards an embedded logic analyzer. This method is effective but can be time and resource consuming. Academic research projects have produced a variety of methods for reducing this difficulty. One option that has previously been unexplored is the use of …