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Engineering Commons

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2010

University of Massachusetts Amherst

Automatic Test Pattern Generation

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On Detection, Analysis And Characterization Of Transient And Parametric Failures In Nano-Scale Cmos Vlsi, Alodeep Sanyal May 2010

On Detection, Analysis And Characterization Of Transient And Parametric Failures In Nano-Scale Cmos Vlsi, Alodeep Sanyal

Open Access Dissertations

As we move deep into nanometer regime of CMOS VLSI (45nm node and below), the device noise margin gets sharply eroded because of continuous lowering of device threshold voltage together with ever increasing rate of signal transitions driven by the consistent demand for higher performance. Sharp erosion of device noise margin vastly increases the likelihood of intermittent failures (also known as parametric failures) during device operation as opposed to permanent failures caused by physical defects introduced during manufacturing process. The major sources of intermittent failures are capacitive crosstalk between neighbor interconnects, abnormal drop in power supply voltage (also known as …