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Articles 1 - 16 of 16
Full-Text Articles in Engineering
Testing A Quantum Computer, Marek Perkowski, Jacob D. Biamonte
Testing A Quantum Computer, Marek Perkowski, Jacob D. Biamonte
Electrical and Computer Engineering Faculty Publications and Presentations
We address the problem of quantum test set generation using measurement from a single basis and the single fault model. Experimental physicists currently test quantum circuits exhaustively, meaning that each n-bit permutative circuit requires ζ x 2n tests to assure functionality, and for an m stage permutative circuit proven not to function properly the current method requires ζ x 2n x m tests as the upper bound for fault localization, where zeta varies with physical implementation. Indeed, the exhaustive methods complexity grows exponentially with the number of qubits, proportionally to the number of stages in a quantum circuit and directly …
Printer Modeling For Document Imaging, Margaret Norris, Elisa H. Barney Smith
Printer Modeling For Document Imaging, Margaret Norris, Elisa H. Barney Smith
Electrical and Computer Engineering Faculty Publications and Presentations
The microscopic details of printing often are unnoticed by humans, but can make differences that affect machine recognition of printed text. Models of the defects introduced into images by printing can be used to improve machine recognition. A probabilistic model used to generate images showing toner placement bears similarities to actual printed images. An equation derived for the average coverage of paper by toner particles having probabilistic placement is developed using geometric probability. Simulations show that averages of ‘printed images’ do have the same average coverage as the derived average coverage equations.
Logic Synthesis For Layout Regularity Using Decision Diagrams, Malgorzata Chrzanowska-Jeske, Alan Mishchenko, Jinsong Zhang, Marek Perkowski
Logic Synthesis For Layout Regularity Using Decision Diagrams, Malgorzata Chrzanowska-Jeske, Alan Mishchenko, Jinsong Zhang, Marek Perkowski
Electrical and Computer Engineering Faculty Publications and Presentations
This paper presents a methodology for logic synthesis of Boolean functions in the form of regular structures that can be mapped into standard cells or programmable devices. Regularity offers an elegant solution to hard problems arising in layout and test generation, at no extra cost or at the cost of increasing the number of gates, which does not always translate into the increase of circuit area. Previous attempts to synthesize logic into regular structures using decision diagrams suffered from an increase in the number of logic levels due to multiple repetitions of control variables. This paper proposes new techniques, which …
Fault Localization In Reversible Circuits Is Easier Than For Classical Circuits, Kavitha Ramasamy, Radhika Tagare, Edward Perkins, Marek Perkowski
Fault Localization In Reversible Circuits Is Easier Than For Classical Circuits, Kavitha Ramasamy, Radhika Tagare, Edward Perkins, Marek Perkowski
Electrical and Computer Engineering Faculty Publications and Presentations
There is recently an interest in test generation for reversible circuits, but nothing has been published about fault localization in such circuits. This paper deals with fault localization for binary reversible (permutative) circuits. We concentrate on functional test based fault localization, to detect and locate “stuck-at” faults in a reversible circuit by creating an adaptive tree. A striking property of reversible circuits is that they exhibit “symmetric” adaptive trees. This helps considerably by being able to generate only half of the tree, and the other half is created as the mirror image of the first half. Because each test covers …
Deterministic And Probabilistic Test Generation For Binary And Ternary Quantum Circuits, Sowmya Aligala, Sreecharani Ratakonda, Kiran Narayan, Kanagalakshmi Nagarajan, Martin Lukac, Jacob D. Biamonte, Marek Perkowski
Deterministic And Probabilistic Test Generation For Binary And Ternary Quantum Circuits, Sowmya Aligala, Sreecharani Ratakonda, Kiran Narayan, Kanagalakshmi Nagarajan, Martin Lukac, Jacob D. Biamonte, Marek Perkowski
Electrical and Computer Engineering Faculty Publications and Presentations
It is believed that quantum computing will begin to have an impact around year 2010. Much work is done on physical realization and synthesis of quantum circuits, but nothing so far on the problem of generating tests and localization of faults for such circuits. Even fault models for quantum circuits have been not formulated yet. We propose an approach to test generation for a wide category of fault models of single and multiple faults. It uses deterministic and probabilistic tests to detect faults. A Fault Table is created that includes probabilistic information. If possible, deterministic tests are first selected, while …
Reports Of The Das02 Working Groups, Elisa Barney Smith, David Monn, Harsha Veeramachaneni, Koichi Kise, Alessio Malizia, Leon Todoran, Adnan El-Nasan, Rolf Ingold
Reports Of The Das02 Working Groups, Elisa Barney Smith, David Monn, Harsha Veeramachaneni, Koichi Kise, Alessio Malizia, Leon Todoran, Adnan El-Nasan, Rolf Ingold
Electrical and Computer Engineering Faculty Publications and Presentations
This document is a collection of four working group reports in the areas of digital libraries, document image retrieval, layout analysis, and Web document analysis. These reports were the outcome of discussions by participants at the Fifth IAPR International Workshop on Document Analysis Systems held in Princeton, NJ on 19-21 August 2002.
Statistical Image Differences, Degradation Features, And Character Distance Metrics, Elisa Barney Smith, Xiaohui Qiu
Statistical Image Differences, Degradation Features, And Character Distance Metrics, Elisa Barney Smith, Xiaohui Qiu
Electrical and Computer Engineering Faculty Publications and Presentations
Document image quality is degraded through processes such as scanning, printing, and photocopying. The resulting bilevel image degradations can be categorized based either on observable degradation features or on degradation model parameters. The image degradation features can be related mathematically to model parameters. In this paper we statistically compare pairs of populations of degraded character images created with different model parameters. The probability that the character populations were degraded by the same model parameters correlates with the relationship between observable degradation features and the model parameters. Two metrics of character difference are used: Hamming distance and moment feature distance. Knowledge …
Interaction Effects Of Slurry Chemistry On Chemical Mechanical Planarization Of Electroplated Copper, Peter A. Miranda, Jerome A. Imonigie, Amy J. Moll
Interaction Effects Of Slurry Chemistry On Chemical Mechanical Planarization Of Electroplated Copper, Peter A. Miranda, Jerome A. Imonigie, Amy J. Moll
Electrical and Computer Engineering Faculty Publications and Presentations
Recent studies have been conducted investigating the effects of slurry chemistry on the copper CMP process. Slurry pH and hydrogen peroxide concentration are two important variables that must be carefully formulated in order to achieve desired removal rates and uniformity. In applications such as throughwafer vertical interconnects, slurry chemistry effects must be thoroughly understood when copper plating thicknesses can measure up to 20 microns thick. The species of copper present on the surface of the wafer can be controlled through formulation of the slurry chemistry resulting in minimizing non-uniformity while aggressively removing copper. Using a design of experiments (DOE) approach, …
An Asynchronous Gals Interface With Applications, Jennifer A. Smith
An Asynchronous Gals Interface With Applications, Jennifer A. Smith
Electrical and Computer Engineering Faculty Publications and Presentations
A low-latency asynchronous interface for use in globally-asynchronous locally-synchronous (GALS) integrated circuits is presented. The interface is compact and does not alter the local clocks of the interfaced local clock domains in any way (unlike many existing GALS interfaces). Two applications of the interface to GALS systems are shown. The first is a single-chip shared-memory multiprocessor for generic supercomputing use. The second is an application-specific coprocessor for hardware acceleration of the Smith-Waterman algorithm. This is a bioinformatics algorithm used for sequence alignment (similarity searching) between DNA or amino acid (protein) sequences and sequence databases such as the recently completed human …
Protein Family Classification Using Structural And Sequence Information, Jennifer A. Smith
Protein Family Classification Using Structural And Sequence Information, Jennifer A. Smith
Electrical and Computer Engineering Faculty Publications and Presentations
Protein family classification usually relies on sequence information (as in the case of hidden Markov models and position-specific scoring matrices) or on structural information where some sort of average positional error between the atomic locations is used. The positional error method requires that the structure of all the proteins to be classified is known. Sequence methods have the advantage that a much larger number of proteins can be classified (since far more sequences are know than structures). However, sequence methods discard a large amount of useful information contained in the structures of the subset of proteins in the family for …
Low-Frequency Surface Wave Propagation And The Viscoelastic Behavior Of Porcine Skin, Donald D. Duncan, Sean J. Kirkpatrick, Li Fang
Low-Frequency Surface Wave Propagation And The Viscoelastic Behavior Of Porcine Skin, Donald D. Duncan, Sean J. Kirkpatrick, Li Fang
Electrical and Computer Engineering Faculty Publications and Presentations
A physical model describing the propagation of lowfrequency surface waves in relation to the viscoelastic behavior of porcine skin is presented, along with a series of empirical studies testing the performance of the model. The model assumes that the skin behaves as a semi-infinite, locally isotropic, viscoelastic halfspace. While the assumption of a semi-infinite body is violated, this violation does not appear to have a significant impact on the performance of the model based on the empirical studies. 1-Hz surface waves in the skin propagate primarily as Rayleigh waves with a wavelength and velocity of approximately 3 m and 3.0 …
Logic Synthesis For Regular Fabric Realized In Quantum Dot Cellular Automata, Marek Perkowski, Alan Mishchenko
Logic Synthesis For Regular Fabric Realized In Quantum Dot Cellular Automata, Marek Perkowski, Alan Mishchenko
Electrical and Computer Engineering Faculty Publications and Presentations
Quantum Dot Cellular Automata are one of the most prospective nano-technologies to build digital circuits. Because of the requirements of only 2 layer wiring and noise avoidance, realizing the circuit in a regular fabrics is even more important for this technology than for classical technologies. In this paper, we propose a regular layout geometry called 3x3 lattice. The main difference of this geometry compared to the known 2x2 lattices is that it allows the cofactors on a level to propagate to three rather than two nodes on the lower level. This gives additional freedom to synthesize compact functional representations. We …
Exact Synthesis Of 3-Qubit Quantum Circuits From Non-Binary Quantum Gates Using Multiple-Valued Logic And Group Theory, Guowu Yang, William N. N. Hung, Xiaoyu Song, Marek Perkowski
Exact Synthesis Of 3-Qubit Quantum Circuits From Non-Binary Quantum Gates Using Multiple-Valued Logic And Group Theory, Guowu Yang, William N. N. Hung, Xiaoyu Song, Marek Perkowski
Electrical and Computer Engineering Faculty Publications and Presentations
We propose an approach to optimally synthesize quantum circuits from non-permutative quantum gates such as Controlled-Square-Root–of-Not (i.e. Controlled-V). Our approach reduces the synthesis problem to multiple-valued optimization and uses group theory. We devise a novel technique that transforms the quantum logic synthesis problem from a multi-valued constrained optimization problem to a permutable representation. The transformation enables us to utilize group theory to exploit the symmetric properties of the synthesis problem. Assuming a cost of one for each two-qubit gate, we found all reversible circuits with quantum costs of 4, 5, 6, etc, and give another algorithm to realize these reversible …
Synthesis Of Reversible Circuits From A Subset Of Muthukrishnan-Stroud Quantum Realizable Multi-Valued Gates, Marek Perkowski, Nicholas Denler, Bruce Yen, Pawel Kerntopf
Synthesis Of Reversible Circuits From A Subset Of Muthukrishnan-Stroud Quantum Realizable Multi-Valued Gates, Marek Perkowski, Nicholas Denler, Bruce Yen, Pawel Kerntopf
Electrical and Computer Engineering Faculty Publications and Presentations
We present a new type of quantum realizable reversible cascade. Next we present a new algorithm to synthesize arbitrary single-output ternary functions using these reversible cascades. The cascades use “Generalized Multi-Valued Gates” introduced here, which extend the concept of Generalized Ternary Gates introduced previously. While there were 216 GTGs, a total of 12 ternary gates of the new type are sufficient to realize arbitrary ternary functions. (The count can be further reduced to 5 gates, three 2-qubit and two 1-qubit). Such gates are realizable in quantum ion trap devices. For some functions, the algorithm requires fewer gates than results previously …
Ultra-Thin Silicon Chips For Submillimeter-Wave Applications, Robert B. Bass, J. C. Schultz, Arthur W. Lichtenberger, R. M. Weiklel, S K. Pan, E. Bryerton, C. K. Walker, Jacob Kooi
Ultra-Thin Silicon Chips For Submillimeter-Wave Applications, Robert B. Bass, J. C. Schultz, Arthur W. Lichtenberger, R. M. Weiklel, S K. Pan, E. Bryerton, C. K. Walker, Jacob Kooi
Electrical and Computer Engineering Faculty Publications and Presentations
We present a process for fabricating ultra-thin silicon chips for submillimeter-wave mixing applications using SOI (Silicon On Insulator) wafers. Such chips allow the profile of the mixer substrate to be minimized within the microstrip channel, thereby simplifying RF design considerations and minimizing machining constraints. The chips feature gold beam leads, RF filter structures, and hot-electron bolometers as the non-linear element. We designed a prototype receiver to demonstrate the feasibility of the ultra-thin silicon chip technology. The receiver has a center frequency of 585GHz and accommodates both diffusion-cooled and phonon-cooled hotelectron bolometer mixers fabricated atop an ultra-thin silicon chip. The chip …
A Transformation Based Algorithm For Ternary Reversible Logic Synthesis Using Universally Controlled Ternary Gates, Marek Perkowski, Eric Curtis
A Transformation Based Algorithm For Ternary Reversible Logic Synthesis Using Universally Controlled Ternary Gates, Marek Perkowski, Eric Curtis
Electrical and Computer Engineering Faculty Publications and Presentations
In this paper a synthesis algorithm for reversible ternary logic cascades is presented. The algorithm can find a solution for any reversible ternary function with n inputs and n outputs utilizing ternary inverter gates and the new (quantum realizable) UCTG gates which are a powerful generalization of ternary Toffoli gates and Generalized Ternary Gates [4]. The algorithm is an extension of the algorithm presented by Dueck, Maslov, and Miller in [3]. A unique feature of this algorithm is that it utilizes no extra wires to generate the outputs. A basic compaction algorithm is defined to improve the results of the …