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Full-Text Articles in Engineering
Minimum Induced Power For A Helicopter In High-Speed Forward Flight, Junsoo (Sean) Hong
Minimum Induced Power For A Helicopter In High-Speed Forward Flight, Junsoo (Sean) Hong
McKelvey School of Engineering Theses & Dissertations
A dynamic inflow model is used to calculate minimum induced power for a helicopter in high-speed forward flight with infinite and finite number of blades. Comparisons between analytical and numerical results are shown and they show good agreement. Different flow conditions (such as with and without reverse flow or inflow feedback) are used to show how each condition affects optimum induced power. Several results confirm the findings of earlier investigations such as a singularity in rotor power in reverse flow and induced power reduction with increase in blade number. Some of the new findings are that greater inflow feedback (due …
Investigating Read/Write Aggregation To Exploit Power Reduction Opportunities Using Dual Supply Voltages, Gu Yunfei
McKelvey School of Engineering Theses & Dissertations
Power consumption plays an important role in computer system design today. On-chip memory structures such as multi-level cache make up a significant proportion of total power consumption of CPU or Application-Specific Integrated Circuit (AISC) chip, especially for memory-intensive application, such as floating-point computation and machine learning algorithm. Therefore, there is a clear motivation to reduce power consumption of these memory structures that are mostly consisting of Static Random-Access Memory (SRAM) blocks. In this defense, I will present the framework of a novel dual-supply-voltage scheme that uses separate voltage levels for memory read and write operations. By quantitatively analyzing the cache …
Cache Power Optimization Using Multiple Voltage Supplies To Exploit Read/Write Asymmetry, Dengxue Yan
Cache Power Optimization Using Multiple Voltage Supplies To Exploit Read/Write Asymmetry, Dengxue Yan
McKelvey School of Engineering Theses & Dissertations
Power consumption becomes more and more critical in computer systems nowadays. Most of the previous work has been focusing on general-purpose computational core, but optimization techniques for conventional CPU core has reached a limit. Our experimental results show that read operations in SRAM can be performed at a lower supply with much reduced power consumption compared to write operations. Based on this observation and the fact that cache, consisting mostly of SRAM, often occupies significant on-chip area of the CPU and consumes a huge portion of the CPU power, we propose a new method to reduce the power consumption of …