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Network-On-Chip Based H.264 Video Decoder On A Field Programmable Gate Array, Ian Barge
Network-On-Chip Based H.264 Video Decoder On A Field Programmable Gate Array, Ian Barge
Master's Theses (2009 -)
This thesis develops the first fully network-on-chip (NoC) based h.264 video decoder implemented in real hardware on a field programmable gate array (FPGA). This thesis starts with an overview of the h.264 video coding standard and an introduction to the NoC communication paradigm. Following this, a series of processing elements (PEs) are developed which implement the component algorithms making up the h.264 video decoder. These PEs, described primarily in VHDL with some Verilog and C, are then mapped to an NoC which is generated using the CONNECT NoC generation tool. To demonstrate the scalability of the proposed NoC based design, …
Java Server Reliability In The Presence Of Failures, Rich Coe
Java Server Reliability In The Presence Of Failures, Rich Coe
Master's Theses (2009 -)
A design for the separation of a server interface and work processing. Numerous sources, Tanenbaum (Tanenbaum Modern Operating Systems, 493), Goscinski (Goscinski Distributed operating systems, 203), and Birman (Birman Reliable distributed systems, 265), all discuss the concept of Two-Phase Commit, where a coordinator directs one or more processes to perform a transaction. If the transaction or any of the processes fail, the coordinator can decide how to proceed by either retrying or aborting the request. The popular web browser Chrome utilizes a separate process for each tab displayed. Should the rendering and display of a web page cause a crash, …