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Articles 1 - 5 of 5
Full-Text Articles in Engineering
A Shade Tolerant Panel Design For Thin Film Photovoltaics, Sourabh Dongaonkar, Muhammad Alam
A Shade Tolerant Panel Design For Thin Film Photovoltaics, Sourabh Dongaonkar, Muhammad Alam
Sourabh Dongaonkar
We analyze the problem of partial shading of thin film photovoltaic (TFPV) panels, using full two dimensional circuit simulations. By accounting for the panel structure and typical array configurations, we can accurately account for the effect of various shading configurations at the cell and panel level. We demonstrate the limitation of external bypass diodes in protecting shaded cells from reverse breakdown, and explore the whole range of shading scenarios and their impact on reverse stress experienced by shaded cells. Based on the analysis, we identify the key aspects of shading problem, and formulate design rules for shadow aware geometrical design …
Reverse Stress Metastability Of Shunt Current In Cigs Solar Cells, Sourabh Dongaonkar, Erik Sheets, Rakesh Agrawal, Muhammad Alam
Reverse Stress Metastability Of Shunt Current In Cigs Solar Cells, Sourabh Dongaonkar, Erik Sheets, Rakesh Agrawal, Muhammad Alam
Sourabh Dongaonkar
Partial shading in thin film solar panels can result in reverse bias stress across shaded cells. Therefore, it is important to understand the effect of such reverse stress in commercially competitive PV technologies such as CIGS. In this paper, we systematically investigate the effect of moderate reverse bias on solution-processed CIGS solar cells. We subject the solar cells to varying degrees of reverse biases and continuously monitor the impact of the stress on dark current. We also explore the relaxation behavior of dark current following passive storage and the long term effect of the shadow stress on power output of …
Parallel Recording Of Neurotransmitters Release From Chromaffin Cells Using A 10 X 10 Cmos Ic Potentiostat Array With On-Chip Working Electrodes, Brian Kim, Adam Herbst, Sung Kim, Bradley Minch, Manfred Lindau
Parallel Recording Of Neurotransmitters Release From Chromaffin Cells Using A 10 X 10 Cmos Ic Potentiostat Array With On-Chip Working Electrodes, Brian Kim, Adam Herbst, Sung Kim, Bradley Minch, Manfred Lindau
Bradley Minch
Neurotransmitter release is modulated by many drugs and molecular manipulations. We present an active CMOS-based electrochemical biosensor array with high throughput capability (100 electrodes) for on-chip amperometric measurement of neurotransmitter release. The high-throughput of the biosensor array will accelerate the data collection needed to determine statistical significance of changes produced under varying conditions, from several weeks to a few hours. The biosensor is designed and fabricated using a combination of CMOS integrated circuit (IC) technology and a photolithography process to incorporate platinum working electrodes on-chip. We demonstrate the operation of an electrode array with integrated high-gain potentiostats and output time-division …
Cause And Prevention Of Moisture-Induced Degradation Of Resistance Random Access Memory Nanodevices, Albert Chen
Cause And Prevention Of Moisture-Induced Degradation Of Resistance Random Access Memory Nanodevices, Albert Chen
Albert B Chen
Dielectric thin films in nanodevices may absorb moisture, leading to physical changes and property/performance degradation, such as altered data storage and readout in resistance random access memory. Here we demonstrate using a nanometallic memory that such degradation proceeds via nanoporosity, which facilitates water wetting in otherwise nonwetting dielectrics. Electric degradation only occurs when the device is in the charge-storage state, which provides a nanoscale dielectrophoretic force directing H2O to internal field centers (sites of trapped charge) to enable bond rupture and charged hydroxyl formation. While these processes are dramatically enhanced by an external DC or AC field and electron-donating electrodes, …
Demonstration And Modeling Of Multi-Bit Resistance Random Access Memory, Albert Chen
Demonstration And Modeling Of Multi-Bit Resistance Random Access Memory, Albert Chen
Albert B Chen
Although intermediates resistance states are common in resistance random access memory (RRAM), two-way switching among them has not been demonstrated. Using a nanometallic bipolar RRAM, we have illustrated a general scheme for writing/rewriting multi-bit memory using voltage pulses. Stability conditions for accessing intermediate states have also been determined in terms of a state distribution function and the weight of serial load resistance. A multi-bit memory is shown to realize considerable space saving at a modest decrease of switching speed.