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Full-Text Articles in Engineering

Single-Rail Adiabatic Logic For Energy-Efficient And Cpa-Resistant Cryptographic Circuit In Low-Frequency Medical Devices, Amit Degada, Himanshu Thapliyal Dec 2021

Single-Rail Adiabatic Logic For Energy-Efficient And Cpa-Resistant Cryptographic Circuit In Low-Frequency Medical Devices, Amit Degada, Himanshu Thapliyal

Electrical and Computer Engineering Graduate Research

Designing energy-efficient and secure cryptographic circuits in low-frequency medical devices are challenging due to low-energy requirements. Also, the conventional CMOS logic-based cryptographic circuits solutions in medical devices can be vulnerable to side-channel attacks (e.g. correlation power analysis (CPA)). In this article, we explored single-rail Clocked CMOS Adiabatic Logic (CCAL) to design an energy-efficient and secure cryptographic circuit for low-frequency medical devices. The performance of the CCAL logic-based circuits was checked with a power clock generator (2N2P-PCG) integrated into the design for the frequency range of 50 kHz to 250 kHz. The CCAL logic gates show an average of approximately 48% …


Addressing Security Challenges In Embedded Systems And Multi-Tenant Fpgas, Georgios Provelengios Apr 2021

Addressing Security Challenges In Embedded Systems And Multi-Tenant Fpgas, Georgios Provelengios

Doctoral Dissertations

Embedded systems and field-programmable gate arrays (FPGAs) have become crucial parts of the infrastructure that supports our modern technological world. Given the multitude of threats that are present, the need for secure computing systems is undeniably greater than ever. Embedded systems and FPGAs are governed by characteristics that create unique security challenges and vulnerabilities. Despite their array of uses, embedded systems are often built with modest microprocessors that do not support the conventional security solutions used by workstations, such as virus scanners. In the first part of this dissertation, a microprocessor defense mechanism that uses a hardware monitor to protect …


Hardware Security And Side Channel Power Analysis For 16x16 Booth Multiplier In 65nm Cmos Technology, Kanchan Vissamsetty Jan 2021

Hardware Security And Side Channel Power Analysis For 16x16 Booth Multiplier In 65nm Cmos Technology, Kanchan Vissamsetty

Browse all Theses and Dissertations

As feature size is scaling down, dynamic power consumption reduces but static power consumption increases. Due to the increase of static power, leakage currents as a source, the information can be exploited successfully as a side-channel to recover the secrets of the cryptographic implementations. An attacker who has access to the hardware fabrication can insert a Trojan to the design to steal or alter information. In this thesis, a post-fab static voltage variation/detection technique is developed to detect the potential fabrication process Trojan insertion. The technique is, dividing the designed circuit into N equal segments, where each segment would have …