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Simulation And Measurement For Decoupling On Multilayer Pcb Dc Power Buses, Hao Shi, F. Yuan, Fei Sha, James L. Drewniak, Todd H. Hubing, Thomas Van Doren
Simulation And Measurement For Decoupling On Multilayer Pcb Dc Power Buses, Hao Shi, F. Yuan, Fei Sha, James L. Drewniak, Todd H. Hubing, Thomas Van Doren
Electrical and Computer Engineering Faculty Research & Creative Works
DC power bus decoupling of a multi-layer PCB is modeled by a combination of a lumped circuit model at low frequencies ( < 200 MHz), and a mixed-potential integral equation approach at high frequencies. In order to determine the lumped parameters of via interconnects, an effective procedure using a network analyzer has been developed to characterize the trace/via inductances/resistances. For an 8 inch × 10 inch ten-layer test board used in this study, the simulations show good agreement with the measurement. This method can lead to new design strategies of decoupling for multilayer PCB power buses.