Engineering Commons^™

Phase Noise Analyses And Measurements In The Hybrid Memristor-Cmos Phase-Locked Loop Design And Devices Beyond Bulk Cmos, Naheem Olakunle Adesina

LSU Doctoral Dissertations

Phase-locked loop (PLLs) has been widely used in analog or mixed-signal integrated circuits. Since there is an increasing market for low noise and high speed devices, PLLs are being employed in communications. In this dissertation, we investigated phase noise, tuning range, jitter, and power performances in different architectures of PLL designs. More energy efficient devices such as memristor, graphene, transition metal di-chalcogenide (TMDC) materials and their respective transistors are introduced in the design phase-locked loop.

Subsequently, we modeled phase noise of a CMOS phase-locked loop from the superposition of noises from its building blocks which comprises of a voltage-controlled oscillator, …

High Fidelity Satellite Navigation Receiver Front-End For Advanced Signal Quality Monitoring And Authentication, Andrew D. Braun

Theses and Dissertations

Over the last several years, interest in utilizing foreign satellite timing and navigation (satnav) signals to augment GPS has grown. Doing so is not without risks; foreign satnav signals must be vetted and determined to be trustworthy before use in military applications. Advanced signal quality monitoring methods can help to ensure that only authentic and reliable satnav signals are utilized. To effectively monitor and authenticate signals, the front-end must impress as little distortions upon the received signal as possible. The purpose of this study is to design, fabricate, and test the performance of a high-fidelity satnav receiver front-end for advanced …

Impairments In Ground Moving Target Indicator (Gmti) Radar, Phuoc Doan Huu Vu

Dissertations

Radars on multiple distributed airborne or ground based moving platforms are of increasing interest, since they can be deployed in close proximity to the event under investigation and thus offer remarkable sensing opportunities. Ground moving target indicator (GMTI) detects and localizes moving targets in the presence of ground clutter and other interference sources. Space-time adaptive processing (STAP) implemented with antenna arrays has been a classical approach to clutter cancellation in airborne radar. One of the challenges with STAP is that the minimum detectable velocity (MDV) of targets is a function of the baseline of the antenna array: the larger the …

A Wide Band Adaptive All Digital Phase Locked Loop With Self Jitter Measurement And Calibration, Bo Jiang

Graduate College Dissertations and Theses

The expanding growth of mobile products and services has led to various wireless communication standards that employ different spectrum bands and protocols to provide data, voice or video communication services. Software deffned radio and cognitive radio are emerging techniques that can dynamically integrate various standards to provide seamless global coverage, including global roaming across geographical regions, and interfacing with different wireless networks. In software deffned radio and cognitive radio, one of the most critical RF blocks that need to exhibit frequency agility is the phase lock loop (PLL) frequency synthesizer. In order to access various standards, the frequency synthesizer needs …

Phase Noise In Cmos Phase-Locked Loop Circuits, Yang Liu

LSU Doctoral Dissertations

Phase-locked loops (PLLs) have been widely used in mixed-signal integrated circuits. With the continuously increasing demand of market for high speed, low noise devices, PLLs are playing a more important role in communications. In this dissertation, phase noise and jitter performances are investigated in different types of PLL designs. Hot carrier and negative bias temperature instability effects are analyzed from simulations and experiments. Phase noise of a CMOS phase-locked loop as a frequency synthesizer circuit is modeled from the superposition of noises from its building blocks: voltage-controlled oscillator, frequency divider, phase-frequency detector, loop filter and auxiliary input reference clock. A …

Low Jitter Phase-Locked Loop Clock Synthesis With Wide Locking Range, Adnan Gundel

Dissertations

The fast growing demand of wireless and high speed data communications has driven efforts to increase the levels of integration in many communications applications. Phase noise and timing jitter are important design considerations for these communications applications. The desire for highly complex levels of integration using low cost CMOS technologies works against the minimization of timing jitter and phase noise for communications systems which employ a phase-locked loop for frequency and clock synthesis with on-chip VCO. This dictates an integrated CMOS implementation of the VCO with very low phase noise performance. The ring oscillator VCOs based on differential delay cell …

A Study Of Phase Noise And Jitter In Submicron Cmos Phase-Locked Loop Circuits, Chi Zhang

LSU Doctoral Dissertations

Phase-locked loops (PLLs) are widely used in communication systems. With the continuously expanding of market for high speed, portable communication devices, low noise CMOS submicron integrated circuit designs of PLL for different applications are in large demand. In this dissertation, phase noise and jitter properties of PLL and its building blocks are investigated both at the physical and system levels. At the physical level, hot carrier effect in submicron MOSFETs has been considered. As one of the most dominant noise sources of PLL, the voltage-controlled oscillator (VCO) is considered when investigating the noise degradation induced by the hot carrier effect. …

Exploring The Hot-Carrier Effect On The Wireless Transceivers, Sameer R. Herlekar

LSU Doctoral Dissertations

Phase noise can be regarded as the most severe cause of performance degradation in the wireless communication systems. The hot-carriers (HCs), found in the CMOS synchronization circuits, are the high-energy charge carriers that degrade the MOSFET devices’ performance by increasing the threshold voltage required to operate the MOSFETs. The HC effect manifests itself as the phase noise whose level increases with the continued MOSFET operation and such increases result in the performance degradation of the voltage-controlled oscillator (VCO) built on the MOSFETs. The HC effect is particularly evident in the short-channel MOSFET devices. In this dissertation, we analyze the wireless …

Phase Noise Effects On Ofdm : Analysis And Mitigation, Songping Wu

Dissertations

Orthogonal frequency division multiplexing (OFDM) is a promising technique which has high spectrum efficiency and the robustness against channel frequency selectivity. One drawback of OFDM is its sensitivity to phase noise. It has been shown that even small phase noise leads to significant performance loss of OFDM. Therefore, phase noise effects on OFDM systems need to be analyzed and methods be provided to its mitigation.

Motivated by what have been proposed in the literature, the exact signal to interference plus noise ratio (SINR) is derived in this dissertation for arbitrary phase noise levels. In a multiple access environment with multiple …