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Full-Text Articles in Engineering
Optimal Design Of Discrete-Time Delta Sigma Modulators, Matthew Edward Jackson
Optimal Design Of Discrete-Time Delta Sigma Modulators, Matthew Edward Jackson
UNLV Theses, Dissertations, Professional Papers, and Capstones
In this thesis, optimal signal transfer functions (STFs) and noise transfer functions (NTFs) for discrete time delta sigma (ΔΣ) modulators are determined. For a given oversampling rate (OSR), these STFs and NTFs are optimized with respect to a weighted combination of the ΔΣ modulator's signal-to-noise ratio (SNR) and dynamic range (DR). This optimization problem is solved using a novel hybrid orthogonal genetic (HOG) algorithm that uses customized genetic operators to improve algorithm performance and accuracy when applied to multimodal, non-differentiable performance surfaces. To generate optimal system functions, the HOG algorithm is implemented as a constrained global optimizer to minimize cost …
A 10-Bit 100msample/S Pipeline Analog- To-Digital Converter In Cmos, Pieter Berkelaar
A 10-Bit 100msample/S Pipeline Analog- To-Digital Converter In Cmos, Pieter Berkelaar
Theses
High speed, medium resolution ADC’s, are required for many applications, including wireless receivers, ultrasound systems, wireline interfaces, cameras and camcorders. Low power dissipation is important, particularly for portable equipment where battery life must be maximised. The pipeline ADC architecture is particularly suited to such applications. Its strength comes from the manner in which it performs a conversion, distributing the work in time and amongst successive stages. These stages operate concurrently, maintaining high throughput. Each stage is made up of a fully differential switched capacitor sample-and- hold amplifier and some other circuitry. Designing these circuits to operate at l00MHz is extremely …
Development Of A 4-Bit Parallel Analog-To-Digital Converter And A Four- Quadrant Double-Balanced Mixer Using Heterojunction Bipolar Transistor Technology, Scott F. Jokerst
Development Of A 4-Bit Parallel Analog-To-Digital Converter And A Four- Quadrant Double-Balanced Mixer Using Heterojunction Bipolar Transistor Technology, Scott F. Jokerst
Theses and Dissertations
A 4-bit parallel analog-to-digital converter (ADC) and a four- quadrant double-balanced mixer were designed and simulated using heterojunction bipolar transistor (HBT) technology to test the dc and high-frequency characteristics of HBTs. HSPICE simulations of small-scale components and the large-scale ADC operated within expected ranges. The ADC implemented with the Rockwell HBT model operated at a sampling rate of over 1 GHz, and the Fellows model also operated at a 1 GHz sampling rate. The mixer produced an intermediate frequency (IF) signal using radio frequency (RF) and local oscillator (LO) inputs. The circuit produced a +9 dB power gain with less …