Open Access. Powered by Scholars. Published by Universities.®
Articles 1 - 2 of 2
Full-Text Articles in Engineering
Investigation Of Single Pmosfet Gate Oxide Degradation On Nor Logic Circuit Operability, David Estrada
Investigation Of Single Pmosfet Gate Oxide Degradation On Nor Logic Circuit Operability, David Estrada
McNair Scholars Research Journal
The impact of gate oxide degradation of a single pMOSFET on the performance of the CMOS NOR logic circuit has been examined using a switch matrix technique. A constant voltage stress of -4.0V was used to induce a low level of degradation to the 2.0nm gate oxide of the pMOSFET. Characteristics of the CMOS NOR logic circuit following gate oxide degradation are analyzed in both the DC and V-t domains. The NOR gate rise time increases by approximately 30%, which may lead to timing or logic errors in high frequency digital circuits. Additionally, the voltage switching point of the NOR …
Electrical Characterization Of A Second-Gate In A Silicon-On-Insulator Transistor, Antonio Oblea
Electrical Characterization Of A Second-Gate In A Silicon-On-Insulator Transistor, Antonio Oblea
McNair Scholars Research Journal
As an independent double-gate, silicon-on-insulator transistor, the FlexfetTM is suited for a wide range of applications in analog and digital circuitry. This study investigates the ability of the JFET bottom-gate to adjust and control several parameters in the FlexfetTM as well as shield against performance degradation due to substrate biasing. The device parameters under investigation include drive current, leakage current, and threshold voltage. The newly assigned F-factor describes the ability of FlexfetTM’s bottomgate to adjust the threshold voltage. FlexfetTM exhibits nearly a 10x and 3.5x increase in drive current for the nMOS and pMOS devices, …