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Electrical and Computer Engineering
UNLV Theses, Dissertations, Professional Papers, and Capstones
Network-on-Chip; Networks on a chip; Router; Routers (Computer networks); Routing (Computer network management); Virtual channel; WK-recursive; Wormhole routing; Wormhole switching
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Parameterizable Network-On-Chip Emulation Framework, Jaya Suseela
Parameterizable Network-On-Chip Emulation Framework, Jaya Suseela
UNLV Theses, Dissertations, Professional Papers, and Capstones
Networks-on-Chip (NoCs) have been proposed as a promising solution to complex on-chip communication problems. But there is no public accessible HDL synthesizable NoC framework which connects industrial level cores and runs real applications on them. Moreover, many challenging research problems remain unsolved at all levels of design abstraction; design exploration of NoC architecture for applications, scheduling and mapping algorithms, evaluation of switching, topology or routing algorithm for efficient execution of application and optimizing communication cost, area, energy etc Solution to solve the above problem calls for the development of synthesizable, parameterizable NoC Framework that would evaluate and implement the above …