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Electrical and Computer Engineering
Electrical and Computer Engineering Faculty Research & Creative Works
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Full-Text Articles in Engineering
Eaf Voltage Flicker Mitigation By Facts/Ess, Li Zhang, Yilu Liu, Michael R. Ingram, Dale T. Bradshaw, Steve Eckroad, Mariesa Crow
Eaf Voltage Flicker Mitigation By Facts/Ess, Li Zhang, Yilu Liu, Michael R. Ingram, Dale T. Bradshaw, Steve Eckroad, Mariesa Crow
Electrical and Computer Engineering Faculty Research & Creative Works
One of the problems caused by an electrical arc furnace (EAF) is voltage fluctuation from the variations of the active and reactive furnace load, which are known as voltage flickers. In this paper, voltage flicker mitigation results by different FACTS and energy storage systems (ESS) were presented. The system X/R ratio looking from the point of common coupling, which has a special impact on the effectiveness of active compensation, was discussed. The study has clarified the misunderstanding of how the system X/R ratio should be calculated. The study showed that FACTS with ESS could play a better role than reactive …
Pulse Regulation Control Technique For Bifred Converter, Mehdi Ferdowsi, Ali Emadi, Mark Telefus, Curtis Davis
Pulse Regulation Control Technique For Bifred Converter, Mehdi Ferdowsi, Ali Emadi, Mark Telefus, Curtis Davis
Electrical and Computer Engineering Faculty Research & Creative Works
Pulse Regulation control scheme is presented and applied to BIFRED converter operating in discontinuous conduction mode (DCM). In contrast to the conventional control techniques, the principal idea of Pulse Regulation is to regulate the output voltage using a series of high and low power pulses generated by the current of the input inductor. In this paper, analysis of BIFRED converter operating in DCM is presented. The basic idea of Pulse Regulation as well as the estimation of the output voltage ripple is introduced. Experimental results on a prototype converter are also demonstrated.
A Multi-Processor Control System Architecture For A Cascaded Statcom With Energy Storage, Chang Qian, Stan Atcitty, Mariesa Crow
A Multi-Processor Control System Architecture For A Cascaded Statcom With Energy Storage, Chang Qian, Stan Atcitty, Mariesa Crow
Electrical and Computer Engineering Faculty Research & Creative Works
This paper presents a multi-processor control system for a general purpose five-level cascaded inverter for real time power system applications. Practical design considerations for the digital controller architecture as well as the power converter are discussed and a 3 kVA laboratory prototype is presented. As a case study, a StatCom with battery energy storage was implemented on this multi-processor controlled inverter system. To eliminate the troublesome PI parameter tuning and the limitation of small signal models, which exist in conventional control for StatComs, a new and simple control method based on large signal model was designed to realize four-quadrant power …