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Dc Power-Bus Design Using Fdtd Modeling With Dispersive Media And Surface Mount Technology Components, Xiaoning Ye, Marina Koledintseva, Min Li, James L. Drewniak
Dc Power-Bus Design Using Fdtd Modeling With Dispersive Media And Surface Mount Technology Components, Xiaoning Ye, Marina Koledintseva, Min Li, James L. Drewniak
Electrical and Computer Engineering Faculty Research & Creative Works
DC power-bus modeling in high-speed digital design using the finite-difference time-domain (FDTD) method is demonstrated herein. The dispersive character of the dielectric layers used in printed circuit board substrates is taken into account in this study. In particular, FR-4 is considered. The complex permittivity of the dielectric is approximated by a Debye model. A wide-band frequency response (100 MHz-5 GHz) is obtained through a single FDTD simulation. Good agreement is achieved between the modeled and measured results for a typical dc power-bus structure with multiple surface mount technology (SMT) decoupling capacitors placed on the printed circuit board (PCB). The FDTD …
Quantifying Smt Decoupling Capacitor Placement In Dc Power-Bus Design For Multilayer Pcbs, Jun Fan, James L. Drewniak, James L. Knighten, Norman W. Smith, Antonio Orlandi, Thomas Van Doren, Todd H. Hubing, Richard E. Dubroff
Quantifying Smt Decoupling Capacitor Placement In Dc Power-Bus Design For Multilayer Pcbs, Jun Fan, James L. Drewniak, James L. Knighten, Norman W. Smith, Antonio Orlandi, Thomas Van Doren, Todd H. Hubing, Richard E. Dubroff
Electrical and Computer Engineering Faculty Research & Creative Works
Noise on a dc power-bus that results from device switching, as well as other potential mechanisms, is a primary source of many signal integrity (SI) and electromagnetic interference (EMI) problems. Surface mount technology (SMT) decoupling capacitors are commonly used to mitigate this power-bus noise. A critical design issue associated with this common practice in high-speed digital designs is placement of the capacitors with respect to the integrated circuits (ICs). Local decoupling, namely, placing SMT capacitors in proximity to ICs, is investigated in this study. Multilayer PCB designs that employ entire layers or area fills for power and ground in a …
Improving The High-Frequency Attenuation Of Shunt Capacitor, Low-Pass Filters, Christopher N. Olsen, Thomas Van Doren, Todd H. Hubing, James L. Drewniak, Richard E. Dubroff
Improving The High-Frequency Attenuation Of Shunt Capacitor, Low-Pass Filters, Christopher N. Olsen, Thomas Van Doren, Todd H. Hubing, James L. Drewniak, Richard E. Dubroff
Electrical and Computer Engineering Faculty Research & Creative Works
Circuit board mounted, shunt capacitive filters are less effective at high frequencies because of the mutual inductance (M) that exists between the input and output ports. An approximate expression for the mutual inductance is M=(μh/2π)ln(h/a); where h=via length and a=radius of the via connecting the capacitor to the return plane. The reduced mutual inductance associated with the new, three-terminal, surface-mounted capacitor results in more than 15 dB increased attenuation compared to two-terminal capacitors over the 0.3-6.0 GHz range with 50 Ω source and load terminations
Mitigating Power Bus Noise With Embedded Capacitance In Pcb Designs, Minjia Xu, Todd H. Hubing, Juan Chen, James L. Drewniak, Thomas Van Doren, Richard E. Dubroff
Mitigating Power Bus Noise With Embedded Capacitance In Pcb Designs, Minjia Xu, Todd H. Hubing, Juan Chen, James L. Drewniak, Thomas Van Doren, Richard E. Dubroff
Electrical and Computer Engineering Faculty Research & Creative Works
This paper investigates the power bus noise and power bus impedance of printed circuit boards with four different kinds of embedded capacitance. These boards have power-ground plane pairs separated by a very thin layer of material with high dielectric permittivity. It is shown that embedded capacitance effectively reduces power bus noise over the entire frequency range evaluated (up to 5 GHz).