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Electrical and Computer Engineering

Electrical and Computer Engineering Faculty Publications and Presentations

Integrated circuit interconnections

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Full-Text Articles in Engineering

Integrating Through-Wafer Interconnects With Active Devices And Circuits, Jim Jozwiak, Richard G. Southwick Iii, Vaughn N. Johnson, William B. Knowlton, Amy J. Moll Feb 2008

Integrating Through-Wafer Interconnects With Active Devices And Circuits, Jim Jozwiak, Richard G. Southwick Iii, Vaughn N. Johnson, William B. Knowlton, Amy J. Moll

Electrical and Computer Engineering Faculty Publications and Presentations

Through wafer interconnects (TWIs) enable vertical stacking of integrated circuit chips in a single package. A complete process to fabricate TWIs has been developed and demonstrated using blank test wafers. The next step in integrating this technology into 3D microelectronic packaging is the demonstration of TWIs on wafers with preexisting microcircuitry. The circuitry must be electrically accessible from the backside of the wafer utilizing the TWIs; the electrical performance of the circuitry must be unchanged as a result of the TWI processing; and the processing must be as cost effective as possible. With these three goals in mind, several options …


Thermo-Mechanical Characterization Of Copper Through-Wafer Interconnects, Peter A. Miranda, Amy J. Moll Jan 2006

Thermo-Mechanical Characterization Of Copper Through-Wafer Interconnects, Peter A. Miranda, Amy J. Moll

Electrical and Computer Engineering Faculty Publications and Presentations

Copper through wafer interconnects (TWIs) have become a viable solution to providing interconnectivity between stacked die. In a world where minimizing chip real estate while increasing functionality is the goal for further miniaturization of electronics, TWIs hold a key role as new packaging schemes become critical for overall higher density. Little is known, however, about the impacts of mismatched coefficients of thermal expansion (CTEs) inherent to the materials used in their construction. CTE differences, if left unresolved, can pose reliability issues during TWI operation. This research focuses on providing insight into the stress levels experienced by TWI materials through finite …


Novel Slurry Solutions For Thick Cu Cmp, Peter A. Miranda, Jerome A. Imonigie, Aaron L. Erbe, Amy J. Moll Apr 2005

Novel Slurry Solutions For Thick Cu Cmp, Peter A. Miranda, Jerome A. Imonigie, Aaron L. Erbe, Amy J. Moll

Electrical and Computer Engineering Faculty Publications and Presentations

Electro-plating methods currently used to deposit Cu in through-wafer interconnect applications result in the formation of a thick Cu layer with large amounts of topographical variation. In this paper, alternative methods for thick Cu removal are investigated using a two-step slurry CMP approach.