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Electrical and Computer Engineering
Electrical and Computer Engineering Faculty Publications and Presentations
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Synthesis Of Reversible Circuits For Large Reversible Functions, Marek Perkowski, Nouraddin Alhagi, Maher Hawash
Synthesis Of Reversible Circuits For Large Reversible Functions, Marek Perkowski, Nouraddin Alhagi, Maher Hawash
Electrical and Computer Engineering Faculty Publications and Presentations
This paper presents a new algorithmMP (multiple pass) to synthesize large reversible binary circuits without ancilla bits. The well-known MMD algorithm for synthesis of reversible circuits requires to store a truth table (or a Reed-Muller - RM transform) as a 2n vector to represent a reversible function of n variables. This representation prohibits synthesis of large functions. However, in MP we do not store such an exponentially growing data structure. The values of minterms are calculated in MP dynamically, one-by-one, from a set of logic equations that specify the reversible circuit to be designed. This allows for synthesis of large …
Evolutionary Quantum Logic Synthesis Of Boolean Reversible Logic Circuits Embedded In Ternary Quantum Space Using Heuristics, Martin Lukac, Marek Perkowski, Michitaka Kameyama
Evolutionary Quantum Logic Synthesis Of Boolean Reversible Logic Circuits Embedded In Ternary Quantum Space Using Heuristics, Martin Lukac, Marek Perkowski, Michitaka Kameyama
Electrical and Computer Engineering Faculty Publications and Presentations
It has been experimentally proven that realizing universal quantum gates using higher-radices logic is practically and technologically possible. We developed a Parallel Genetic Algorithm that synthesizes Boolean reversible circuits realized with a variety of quantum gates on qudits with various radices. In order to allow synthesizing circuits of medium sizes in the higher radix quantum space we performed the experiments using a GPU accelerated Genetic Algorithm. Using the accelerated GA we compare heuristic improvements to the mutation process based on cost minimization, on the adaptive cost of the primitives and improvements due to Baldwinian vs. Lamarckian GA.We also describe various …
Fault Testing Quantum Switching Circuits, Marek Perkowski, Jacob Biamonte
Fault Testing Quantum Switching Circuits, Marek Perkowski, Jacob Biamonte
Electrical and Computer Engineering Faculty Publications and Presentations
Test pattern generation is an electronic design automation tool that attempts to find an input (or test) sequence that, when applied to a digital circuit, enables one to distinguish between the correct circuit behavior and the faulty behavior caused by particular faults. The effectiveness of this classical method is measured by the fault coverage achieved for the fault model and the number of generated vectors, which should be directly proportional to test application time. This work address the quantum process validation problem by considering the quantum mechanical adaptation of test pattern generation methods used to test classical circuits. We found …