Open Access. Powered by Scholars. Published by Universities.®

Engineering Commons

Open Access. Powered by Scholars. Published by Universities.®

Electrical and Computer Engineering

Electrical & Computer Engineering Theses & Dissertations

IDPAL

Publication Year

Articles 1 - 3 of 3

Full-Text Articles in Engineering

Idpal - Input Decoupled Partially Adiabatic Logic: Implementation And Examination, Kevin A. Johnson Apr 2018

Idpal - Input Decoupled Partially Adiabatic Logic: Implementation And Examination, Kevin A. Johnson

Electrical & Computer Engineering Theses & Dissertations

This thesis presents the experimental results of a four-phase IDPAL eight-input exclusive-OR gate. The following problems with IDPAL are addressed: multistage circuits malfunctioning, simulation convergence anomalies, and inferring input information through the power clock current. EPAD MOSFETs, which provide a low threshold voltage, are shown to be unsuccessful in correcting the malfunctioning behavior of multilayer circuits. A solution to multilayer IDPAL circuits malfunctioning, called IDPAL with discharge, is shown. The differences between simulation waveforms produced by LTspice and the experimental circuits recorded by a Tektronix’s Oscilloscope are investigated. IDPAL is implemented and analyzed using ALD MOSFETs for the following adiabatic …


Idpal - Input Decoupled Partially Adiabatic Logic Family: Theory And Implementation Of Side-Channel Attack Resistant Circuits, Matthew Edward Mcallister Apr 2016

Idpal - Input Decoupled Partially Adiabatic Logic Family: Theory And Implementation Of Side-Channel Attack Resistant Circuits, Matthew Edward Mcallister

Electrical & Computer Engineering Theses & Dissertations

The Input Decoupled Partially Adiabatic Logic (IDPAL) family was developed by Cutitaru to consume less power than other logic families as well as producing a resistance to side-channel attacks. With modifications made to IDPAL, the side-channel attack resistance is being revisited and quantified. The three logic families are compared in the work are CMOS, 2N2P, and IDPAL. An AND/NAND gate was created using each logic family and compared with two tests: 1) a simulated side-channel attack and 2) an energy analysis. In this work, a side-channel attack is the ability to predict the inputs of a logic circuit based on …


Idpal – A Partially-Adiabatic Energy-Efficient Logic Family: Theory And Applications To Secure Computing, Mihail T. Cutitaru Jul 2014

Idpal – A Partially-Adiabatic Energy-Efficient Logic Family: Theory And Applications To Secure Computing, Mihail T. Cutitaru

Electrical & Computer Engineering Theses & Dissertations

Low-power circuits and issues associated with them have gained a significant amount of attention in recent years due to the boom in portable electronic devices. Historically, low-power operation relied heavily on technology scaling and reduced operating voltage, however this trend has been slowing down recently due to the increased power density on chips. This dissertation introduces a new very-low power partially-adiabatic logic family called Input-Decoupled Partially-Adiabatic Logic (IDPAL) with applications in low-power circuits. Experimental results show that IDPAL reduces energy usage by 79% compared to equivalent CMOS implementations and by 25% when compared to the best adiabatic implementation. Experiments ranging …