Engineering Commons^™

Flexible Sigma Delta Time-Interleaved Bandpass Analog-To-Digital Converter, Ryan Edward Mcginnis

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Conversion of analog signals to their digital equivalent earlier in a circuit’s topology facilitates faster and more efficient exploitation of the information contained within. Analog-to-digital converters (ADCs) form the link between the analog and digital realms. In high frequency circuits ADCs must often be implemented further downstream after several stages of down-conversion, or through the use of more expensive technologies such as Bi-polar Junction Transistors or Gallium Arsenide. This thesis presents a technique to utilize Complimentary Metal Oxide Semiconductor technology in a parallel time-interleaved architecture. This will reduce circuit complexity and allow the ADC to be placed further upstream reducing …

Fpga Frequency Domain Based Gps Coarse Acquisition Processor Using Fft, Cyprian D. Sajabi

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The Global Positioning System or GPS is a satellite based technology that has gained widespread use worldwide in civilian and military applications. Direct Sequence Spread spectrum (DSSS) is the method whereby the data transmitted by the satellite and received by user is kept secure, low power and relatively noise-immune. The first step required in the GPS operation is to perform a lock on the incoming signal, both with respect to time synchronization and frequency resolution. Because of the need for reduced time to lock and also reduced hardware, algorithms based in the frequency domain have been developed. These algorithms take …

A Study Of The Impact Of Hardware Design Choices On The System Impulse Response Of A Signal-Level Radar Simulation, Kelly Renee Feirstine

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The main goal of this research is to study the effect of hardware design choices at the signal-level of an end-to-end radar system. An implementation of waveform diversity concepts, or the use of various waveforms in both transmit and receive is employed. An end-to-end Matlab simulation is developed such that the system impulse response to hardware imperfections and waveform parameters such as bandwidth and frequency channel spacing can be analyzed. Multiple frequency channels as well as multiple pulses are also considered in the research.

All hardware components are nonlinear to some degree. The nonlinearities of the hardware give rise to …

System Analysis And Rf-Floodlight Exploitation Of Short-Range Gotcha Repeaters, Jose A. Montes De Oca

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Emerging wide-area synthetic aperture radar (SAR) system concepts call for a single data collection platform to orbit a large ( e.g., 20-km) spot at a nominal range of 40-km. The large standoff distance and desire for fine resolution, coupled with a need for persistent real-time sensing, pose a significant challenge in terms of clutter-to-noise ratio (CNR) performance and data processing. Increased CNR and reduced processing load can be achieved by decreasing the range of the SAR system and the size of the area of interest. Employing multiple cooperating SAR systems allows the same overall coverage area to be maintained …

Digital Channelized Wide Band Receiver Implemented With A Systolic Array Of Multi-Rate Fir Filters, David M. Rodney

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This thesis proposes the use of a Systolic Array of Multi-Rate FIR Filters to improve performance by eliminating the requirement of the FFT and De-Multiplexer associated with the conventional receiver while achieving the same functionality. The FFT is a major bottle neck for improving system performance for the conventional DCWBR because many complex multiplications and additions are required. The proposed new architecture is designed and evaluated in MATLAB to illustrate its viability. Two approaches for improved channel arbitration are accessed in MATLAB, namely, channel bin’s rms comparison and parallelism of the Systolic Array Multi-Rate FIR Filters. The FIR filters (high-pass …

Design And Evaluation Of A Discrete Wavelet Transform Based Multi-Signal Receiver, Tony Chiang

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General purpose receivers of today are designed with a broad bandwidth so that the receiver can accept a wide range of signal frequencies. These receivers usually accept one signal along with any interference that is included. To increase the signal detection capabilities of the wideband receiver, a design for a receiver that can detect two signals is needed. One of the requirements for this receiver is that the second weak signal needs to be processed in a timely manner so that the receiver can recognize it. To remedy the problem, a module was developed using wavelet-based techniques to remove spurs …

Implementation Of A Multi-Layered Fuzzy Controller On An Fpga, Ajit Paal Singh Khatra

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The uses of Autonomous Mobile robots range from the teleoperated Sojourner on the Mars Pathfinder mission to cleaning robots in the Paris Metro. They have overtaken tasks which are too difficult or dangerous to perform or require the repetition of the same procedure over and over again and can become dull for a human to perform. The objective of this thesis is to develop and implement a multilayered fuzzy controller on an FPGA for the navigational control of an autonomous mobile robot (AMR). The navigational algorithm assists the robot in navigating through complex environments of passages and hallways. The FPGA …

Direct Digital Frequency Synthesizer Implementation Using A High Speed Rom Alternative In Ibm 0.13u Technology, Matthew R. Gerald

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The direct digital synthesizer is a method of signal generation with many benefits. DDS designs are able to switch frequencies very quickly and also tune precisely to many different frequencies with the use of a constant operating frequency. There is a need for a low power, high speed DDS in the form an ASIC design. One major bottleneck in common DDS systems is the slow access time of a ROM. There is also a need for a high speed ROM alternative. This thesis delivers a high speed ASIC Direct Digital Synthesizer which operates at a 1 GHz operating frequency. This …

Design Of A High-Power, High-Efficiency, Low-Distortion Direct From Digital Amplifier, Weston R. Earick

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For the process of converting low-power digital signals into their high-power analog counterparts, the functions of digital-to-analog conversion (at low power) and analog power amplification are separately implemented. This thesis proposes a new “STAC-DAC” circuit topology which directly realizes high-power analog output from low-power digital input signals. The ability to achieve a “direct from digital” high-power analog output in a single high-efficient, low-distortion design has significant potential in audio reproduction, and flexible signal generation applications. In this thesis, the “STAC-DAC” is described and its implementation via MATLAB and LTSpice is discussed. The results of simulations are used to prove the …