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Electrical and Computer Engineering

Utah State University

2009

Mapping

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Full-Text Articles in Engineering

A Methodology To Design Pipelined Simulated Annealing Kernel Accelerators On Space-Borne Field-Programmable Gate Arrays, Jeffrey Michael Carver May 2009

A Methodology To Design Pipelined Simulated Annealing Kernel Accelerators On Space-Borne Field-Programmable Gate Arrays, Jeffrey Michael Carver

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Increased levels of science objectives expected from spacecraft systems necessitate the ability to carry out fast on-board autonomous mission planning and scheduling. Heterogeneous radiation-hardened Field Programmable Gate Arrays (FPGAs) with embedded multiplier and memory modules are well suited to support the acceleration of scheduling algorithms. A methodology to design circuits specifically to accelerate Simulated Annealing Kernels (SAKs) in event scheduling algorithms is shown. The main contribution of this thesis is the low complexity scoring calculation used for the heuristic mapping algorithm used to balance resource allocation across a coarse-grained pipelined data-path. The methodology was exercised over various kernels with different …