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Electrical and Computer Engineering

Utah State University

Theses/Dissertations

FPGA

Publication Year

Articles 1 - 5 of 5

Full-Text Articles in Engineering

Development Of The Digital Signal Processing For The Space Weather Probes Version 2 Sensor Using The Matlab/Simulink Environment, Benjamin J. Lewis Aug 2023

Development Of The Digital Signal Processing For The Space Weather Probes Version 2 Sensor Using The Matlab/Simulink Environment, Benjamin J. Lewis

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Space Weather Probes (SWP) is an instrument that provides measurements of the plasma environment of the ionosphere. SWP was flown on the Scintillation Prediction Observation Task (SPORT) mission, a joint mission between the United States of America and Brazil. This thesis will develop the digital signal processing (DSP) hardware design for the Space Weather Probes version 2 (SWP2). The data from these instruments will be used to determine the density and temperature of the local plasma, as well as the electric field in the local plasma. This thesis presents the design and testing of the DSP designs for all of …


Statistical Analysis Of A Channel Emulator For Noisy Gradient Descent Low Density Parity Check Decoder, Rakin Muhammad Shadab Aug 2019

Statistical Analysis Of A Channel Emulator For Noisy Gradient Descent Low Density Parity Check Decoder, Rakin Muhammad Shadab

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

The purpose of a channel emulator is to emulate a communication channel in real-life use case scenario. These emulators are often used in the domains of research in digital and wireless communication. One such area is error correction coding, where transmitted data bits over a channel are decoded and corrected to prevent data loss. A channel emulator that does not follow the properties of the channel it is intended to replicate can lead to mistakes while analyzing the performance of an error-correcting decoder. Hence, it is crucial to validate an emulator for a particular communication channel. This work delves into …


Design Of An Adaptable Run-Time Reconfigurable Software-Defined Radio Processing Architecture, Joshua R. Templin Dec 2010

Design Of An Adaptable Run-Time Reconfigurable Software-Defined Radio Processing Architecture, Joshua R. Templin

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

Processing power is a key technical challenge holding back the development of a high-performance software defined radio (SDR). Traditionally, SDR has utilized digital signal processors (DSPs), but increasingly complex algorithms, higher data rates, and multi-tasking needs have exceed the processing capabilities of modern DSPs. Reconfigurable computers, such as field-programmable gate arrays (FPGAs), are popular alternatives because of their performance gains over software for streaming data applications like SDR. However, FPGAs have not yet realized the ideal SDR because architectures have not fully utilized their partial reconfiguration (PR) capabilities to bring needed flexibility. A reconfigurable processor architecture is proposed that utilizes …


Analysis Of Field Programmable Gate Array-Based Kalman Filter Architectures, Arvind Sudarsanam Dec 2010

Analysis Of Field Programmable Gate Array-Based Kalman Filter Architectures, Arvind Sudarsanam

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

A Field Programmable Gate Array (FPGA)-based Polymorphic Faddeev Systolic Array (PolyFSA) architecture is proposed to accelerate an Extended Kalman Filter (EKF) algorithm. A system architecture comprising a software processor as the host processor, a hardware controller, a cache-based memory sub-system, and the proposed PolyFSA as co-processor, is presented. PolyFSA-based system architecture is implemented on a Xilinx Virtex 4 family of FPGAs. Results indicate significant speed-ups for the proposed architecture when compared against a space-based software processor. This dissertation proposes a comprehensive architecture analysis that is comprised of (i) error analysis, (ii) performance analysis, and (iii) area analysis. Results are presented …


A Comprehensive Integration And Analysis Of Dynamic Load Balancing Architectures Within Molecular Dynamics, Christopher Reed Rogers May 2009

A Comprehensive Integration And Analysis Of Dynamic Load Balancing Architectures Within Molecular Dynamics, Christopher Reed Rogers

All Graduate Theses and Dissertations, Spring 1920 to Summer 2023

The world of nano-science is an ever-changing field. Molecular Dynamics (MD) is a computational suite of tools that is useful for analyzing and predicting behaviors of substances on the molecular level. The nature of MD is such that only a few types of computations are repeated thousands or sometimes millions of times over. Even a small increase speedup or efficiency of an MD simulator can compound itself over the life of the simulation and have a positive and observable effect. This thesis is the end result of an attempted speedup of the MD problem. Two types of MD architectures are …