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Low Bandwidth Communication For Networked Power Hardware-In-The-Loop Simulation, Sean Borgsteede
Low Bandwidth Communication For Networked Power Hardware-In-The-Loop Simulation, Sean Borgsteede
Theses and Dissertations
Power-Hardware-In-the-Loop (PHIL) simulations allow the design and validation of power hardware components in virtual power system schemas with near real-time operation. This technique is increasingly used in the development cycle of many products to reduce design costs and increase design fidelity. The Hardware under Test (HuT) interfaces with a simulation of the user’s choosing through a hardware interface (HI). The digitally simulated system (DSS) runs on the real-time simulator before sending a reference value to the hardware interface to enforce. In this virtual to real interface, closed-loop stability and the simulation accuracy are the two paramount criteria in regards to …