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Full-Text Articles in Engineering
Floating-Gate Devices: They Are Not Just For Digital Memories Anymore, Paul Hasler, Bradley Minch, Chris Diorio
Floating-Gate Devices: They Are Not Just For Digital Memories Anymore, Paul Hasler, Bradley Minch, Chris Diorio
Bradley Minch
Since the first reported floating-gate structure in 1967, floating-gate transistors have been used widely to store digital information for long periods in structures such as EPROMs and EEPROMs. Recently floating-gate devices have found applications as analog memories, analog and digital circuit elements, and adaptive processing elements. Floating-gate devices have found commerical applications, e.g. ISD, for long-term non-volatile information storage devices for analog applications. The focus of floating-gate devices has been towards fabrication in standard CMOS processes, as opposed to the specialized processes for fabricating digital non-volatile memories. Floating-gate circuits can be designed at any or all of three levels: analog …
A Floating-Gate Technology For Digital Cmos Processes, Bradley Minch, Paul Hasler
A Floating-Gate Technology For Digital Cmos Processes, Bradley Minch, Paul Hasler
Bradley Minch
We discuss the possibility of developing high-quality floating-gate memories and circuits in digital CMOS technologies that have only one layer of polysilicon. Here, the primary concern is whether or not we can get adequate control-gate linearity from MOS capacitors. We employ two experimental procedures to address this issue and find acceptable floating-gate circuit behaviour with MOS capacitors. First, we simultaneously characterize an MOS capacitor and a linear capacitor; the experimental data show that MOS capacitors behave similarly to linear capacitors over a finite, but usable range. Second, we characterize two typical floating-gateMOS circuit primitives, a floating-gate amplifier and a multiple-input …
Adaptive Circuits Using Pfet Floating-Gate Devices, Paul Hasler, Bradley Minch, Chris Diorio
Adaptive Circuits Using Pfet Floating-Gate Devices, Paul Hasler, Bradley Minch, Chris Diorio
Bradley Minch
In this paper, we describe our floating-gate pFET device, with its many circuit applications and supporting experimental measurements. We developed these devices in standard double-poly CMOS technologies by utilizing many effects inherent in these processes. We add floating-gate charge by electron tunneling, and we remove floating-gate charge by hot-electron injection. With this floating-gate technology, we cannot only build analog EEPROMs, we can also implement adaptation and learning when we consider floating-gate devices to be circuit elements with important time-domain dynamics. We start by discussing non-adaptive properties of floating-gate devices and we present two representative non-adaptive applications. First, we discuss using …
A Low-Voltage Mos Cascode Current Mirror For All Current Levels, Bradley Minch
A Low-Voltage Mos Cascode Current Mirror For All Current Levels, Bradley Minch
Bradley Minch
In this paper, we describe a simple low-voltage MOS cascode current mirror that functions well at all current levels, ranging from weak inversion to strong inversion. The circuit features a wide output voltage swing and requires an input voltage of approximately one diode drop plus a saturation voltage. We present experimental results from a version of the current mirror that was fabricated in a 0.5 μm CMOS process along with a comparison with several other current mirrors with respect both to required input voltage and to output compliance voltage.
A Fully Programmable Log-Domain Bandpass Filter Using Multiple-Input Translinear Elements, Ravi Chawla, Haw-Jing Lo, Arindam Basu, Paul Hasler, Bradley Minch
A Fully Programmable Log-Domain Bandpass Filter Using Multiple-Input Translinear Elements, Ravi Chawla, Haw-Jing Lo, Arindam Basu, Paul Hasler, Bradley Minch
Bradley Minch
In this paper a second order log-domain bandpass filter using multiple input translinear elements (MITEs) operating at a 3V supply. We enhance the capabilities of the filter by utilizing programmable MITE structures as well as programmable current sources, which are covered in this paper. The synthesized bandpass filter is implemented and fabricated using these programmable translinear devices (MITEs). Experimental results are shown from circuit fabricated on a 0.5μm nwell CMOS process available through MOSIS.
Synthesis Of A Translinear Analog Adaptive Filter, Eric Mcdonald, Bradley Minch
Synthesis Of A Translinear Analog Adaptive Filter, Eric Mcdonald, Bradley Minch
Bradley Minch
In this paper, we present a methodology for synthesizing analog systems using a class of circuits called dynamic translinear circuits. We illustrate this method by synthesizing part of a Least-Mean-Squares (LMS) adaptation algorithm used in an analog adaptive filter. We present preliminary experimental results from a chip fabricated ina 0.5-μm double-poly CMOS process.
Synthesis Of Multiple-Input Translinear Element Log-Domain Filters, Bradley Minch
Synthesis Of Multiple-Input Translinear Element Log-Domain Filters, Bradley Minch
Bradley Minch
I present a simple procedure for synthesizing multiple-input translinear element (MITE) log-domain filters from state-space descriptions. We can obtain such state-space descriptions from a variety of sources, and the procedure that I describe can be utilized regardless of the source of the description. We can often derive such descriptions conveniently from already extant filters that have been previously implemented using a different class of filters. I shall illustrate the synthesis procedure by deriving two simple MITE log-domain filters from single-ended voltage-mode OTA-C filter prototypes-I synthesize both a first-order lowpass filter and a fully tunable second-order lowpass filter.
A Low-Voltage Mos Cascode Bias Circuit For All Current Levels, Bradley Minch
A Low-Voltage Mos Cascode Bias Circuit For All Current Levels, Bradley Minch
Bradley Minch
In this paper, the author describes a simple low-voltage MOS cascode bias circuit that functions well at all current levels, ranging from weak inversion to strong inversion. He describes an approach to defining the onset of saturation that is generally useful from a bias-circuit design viewpoint and explains specifically how it was used in designing the low-voltage cascode bias circuit. The author discusses an efficient strategy for laying out the cell in the full-stacked style. He also presents experimental results from a version of the bias circuit that was fabricated in a 1.2-μm CMOS process.
Low-Voltage Wilson Current Mirrors In Cmos, Bradley Minch
Low-Voltage Wilson Current Mirrors In Cmos, Bradley Minch
Bradley Minch
In this paper, we describe three simple low-voltage CMOS analogs of the Wilson current mirror that function well at all current levels, ranging from weak inversion to strong inversion. Each of these current mirrors can operate on a low power-supply voltage of a diode drop plus two saturation voltages and features a wide output-voltage swing with a cascode-type incremental output impedance. Two of the circuits requires an input voltage of a diode drop plus a saturation voltage while the third one features a low input voltage of a saturation voltage. We present experimental results from versions of these three current …
Floating-Gate Techniques For Assessing Mismatch, Bradley Minch
Floating-Gate Techniques For Assessing Mismatch, Bradley Minch
Bradley Minch
I discuss the importance of capacitor matching in the context of using charge stored on floating-gate MOS (FGMOS) transistors to compensate for transistor mismatch in analog circuits. I describe a simple technique that only involves static measurements for assessing the relative mismatch between capacitors. I also show experimental measurements of capacitor mismatch for small capacitors fabricated in 1.2-μm and 0.35-μm double-poly it n-well CMOS process that are commonly available.