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Reversible Logic Synthesis With Cascades Of New Family Of Gates, Mozammel H.A. Khan, Marek Perkowski
Reversible Logic Synthesis With Cascades Of New Family Of Gates, Mozammel H.A. Khan, Marek Perkowski
Electrical and Computer Engineering Faculty Publications and Presentations
Reversible circuits are currently on of top approaches to power minimization and the one whose importance will be only growing with time. In this paper, the well known Feynman gate is generalized to k*k gate and a new generalized k*k family of reversible gates is proposed. A synthesis method for multi-output SOP function using cascades of the new gate family is presented. For utilizing the benefit of product sharing among the output functions, two graph-based data structures are used. Another synthesis method for AND-OR-EXOR function using cascades of the new gate family and generalized Feynman gate is also presented. Synthesis …
Regularity And Symmetry As A Base For Efficient Realization Of Reversible Logic Circuits, Marek Perkowski, Pawel Kerntopf, Andrzej Buller, Malgorzata Chrzanowska-Jeske, Alan Mishchenko, Xiaoyu Song, Anas Al-Rabadi, Lech Jozwiak, Alan Coppola
Regularity And Symmetry As A Base For Efficient Realization Of Reversible Logic Circuits, Marek Perkowski, Pawel Kerntopf, Andrzej Buller, Malgorzata Chrzanowska-Jeske, Alan Mishchenko, Xiaoyu Song, Anas Al-Rabadi, Lech Jozwiak, Alan Coppola
Electrical and Computer Engineering Faculty Publications and Presentations
We introduce a Reversible Programmable Gate Array (RPGA) based on regular structure to realize binary functions in reversible logic. This structure, called a 2 * 2 Net Structure, allows for more efficient realization of symmetric functions than the methods shown by previous authors. In addition, it realizes many non-symmetric functions even without variable repetition. Our synthesis method to RPGAs allows to realize arbitrary symmetric function in a completely regular structure of reversible gates with smaller “garbage” than the previously presented papers. Because every Boolean function is symmetrizable by repeating input variables, our method is applicable to arbitrary multi-input, multi-output Boolean …
Trace: A Visual Software System To Explore Properties Of Reed-Muller Movement Functions, Marek Perkowski, Alan Mishchenko
Trace: A Visual Software System To Explore Properties Of Reed-Muller Movement Functions, Marek Perkowski, Alan Mishchenko
Electrical and Computer Engineering Faculty Publications and Presentations
We present new experimental Windows 95/98/NT software for investigation of graph properties of boolean (in particular, Reed-Muller) logic with an equal number n of inputs and outputs (called movement functions). Realized at the input of an n-bit register, such functions create autonomous Finite State Machines (FSMs). TRACE software system allows the user to visualize State Transition Graphs (STGs) of the autonomous FSMs. Other features of TRACE help explore graph properties of function families. These families are produced by a generic function, differing from it only in the order of components, one operation, or one literal (this literal is complemented or …