Engineering Commons^™

Efficient Methods For Robust Circuit Design And Performance Optimization For Carbon Nanotube Field Effect Transistors, Muhammad Ali

Dissertations and Theses

Carbon nanotube field-effect transistors (CNFETs) are considered to be promising candidate beyond the conventional CMOSFET due to their higher current drive capability, ballistic transport, lesser power delay product and higher thermal stability. CNFETs show great potential to build digital systems on advanced technology nodes with big benefits in terms of power, performance and area (PPA). Hence, there is a great need to develop proven models and CAD tools for performance evaluation of CNFET-based circuits. CNFETs specific parameters, such as number of tubes, pitch (spacing between the tubes) and diameter of CNTs determine current driving capability, speed, power consumption and area …

Drafting In Self-Timed Circuits, Christopher Cowan

Electrical and Computer Engineering PhD Day

Intervals between data items propagating in self-timed circuits are controlled by handshake signals rather than by a clock. The sequence of handshakes can be abstracted as the movement of “tokens”. In many self-timed designs, a trailing token will catch up with a leading token, even when it trails by thousands of gate delays. Simulations in SPICE of a simple GasP circular FIFO reveal this effect. Contrary to earlier work, we find the cause of drafting to be charge stored on an isolated node between two series transistors. This mechanism occurs in many decision gates that implement a logical AND. The …

Semi-Modular Delay Model Revisited In Context Of Relative Timing, Hoon Park, Anping He, Marly Roncken, Xiaoyu Song

Electrical and Computer Engineering Faculty Publications and Presentations

A new definition of semi-modularity to accommodate relative timing constraints in self-timed circuits is presented. While previous definitions ignore such constraints, the new definition takes them into account. The difference on a design solution for a well-known speed-independent circuit implementation of the Muller C element and a set of relative timing constraints that renders the implementation hazard free is illustrated. The old definition produces a false semi-modularity conflict that cannot exist due to the set of imposed constraints. The new definition correctly accepts the solution.

Exact Synthesis Of 3-Qubit Quantum Circuits From Non-Binary Quantum Gates Using Multiple-Valued Logic And Group Theory, Guowu Yang, William N. N. Hung, Xiaoyu Song, Marek Perkowski

Electrical and Computer Engineering Faculty Publications and Presentations

We propose an approach to optimally synthesize quantum circuits from non-permutative quantum gates such as Controlled-Square-Root–of-Not (i.e. Controlled-V). Our approach reduces the synthesis problem to multiple-valued optimization and uses group theory. We devise a novel technique that transforms the quantum logic synthesis problem from a multi-valued constrained optimization problem to a permutable representation. The transformation enables us to utilize group theory to exploit the symmetric properties of the synthesis problem. Assuming a cost of one for each two-qubit gate, we found all reversible circuits with quantum costs of 4, 5, 6, etc, and give another algorithm to realize these reversible …

Fast Heuristic Minimization Of Exclusive-Sums-Of-Products, Alan Mishchenko, Marek Perkowski

Electrical and Computer Engineering Faculty Publications and Presentations

Exclusive-Sums-Of-Products (ESOPs) play an important role in logic synthesis and design-for-test. This paper presents an improved version of the heuristic ESOP minimization procedure proposed in [1,2]. The improvements concern three aspects of the procedure: (1) computation of the starting ESOP cover; (2) increase of the search space for solutions by applying a larger set of cube transformations; (3) development of specialized datastructures for robust manipulation of ESOP covers. Comparison of the new heuristic ESOP minimizer EXORCISM-4 with other minimizers (EXMIN2 [3], MINT [4], EXORCISM-2 [1] and EXORCISM3 [2]) show that, in most cases, EXORCISM-4 produces results of comparable or better …

An Effective Cube Comparison Method For Discrete Spectral Transformations Of Logic Functions, Ingo SchäFer

Dissertations and Theses

Spectral methods have been used for many applications in digital logic design, digital signal processing and telecommunications. In digital logic design they are implemented for testing of logical networks, multiplexer-based logic synthesis, signal processing, image processing and pattern analysis. New developments of more efficient algorithms for spectral transformations (Rademacher-Walsh, Generalized Reed-Muller, Adding, Arithmetic, multiple-valued Walsh and multiple-valued Generalized Reed- Muller) their implementation and applications will be described.

Logic Design Using Programmable Logic Devices, Loc Bao Nguyen

Dissertations and Theses

The Programmable Logic Devices, PLO, have caused a major impact in logic design of digital systems in this decade. For instance, a twenty pin PLO device can replace from three hundreds to six hundreds Transistor Transistor Logic gates, which people have designed with since the 60s. Therefore, by using PLD devices, designers can squeeze more features, reduce chip counts, reduce power consumption, and enhance the reliability of the digital systems.

This thesis covers the most important aspects of logic design using PLD devices. They are Logic Minimization and State Assignment. In addition, the thesis also covers a seldomly used but …